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TAS5036AIPFC Datasheet(PDF) 42 Page - Texas Instruments |
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TAS5036AIPFC Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 62 page  System Procedures for Initialization, Changing Data Rates, and Switching Between Master and Slave Modes 36 SLES061B—November 2002—Revised January 2004 TAS5036A MCLK MUTE Terminal ERR_RCVRY Terminal Change from Master Mode Clock unstable during transition. Change to Slave Mode Volume Ramp Up 120 ms Volume Ramp Down 60 ms ERR_RCVRY can be set at any time within this interval Release ERR_RCVRY and then MUTE when I2C registers are programmed > 5 ms RESET Terminal M_S Terminal < 2 ms Wait a minimum of 100 µs to set M_S Restore register settings via I2C Wait a minimum of 100 µs after the LOW to HIGH transition of RESET Figure 4−7. Changing Between Master and Slave Clock Mode |
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