TAS5036AIPFC datasheet(25/62 Pages) TI

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Architecture Overview

SLES061B—November 2002—Revised January 2004

TAS5036A

Attenuation (Gain) − dB

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

−110

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

STEP SIZE

ATTENUATION (GAIN)

Figure 2−10. Attenuation Curve

The volume control format for each channel is expressed in 8 bits. The volume for each channel is set by writing

8 bits via the serial control interface. The MSB bit is written first as in the bit position 0 (LSB position).

The volume for each channel can be set using a single- or multiple-address write operation to the volume

control register via the serial control interface. Changing the volume of all six channels requires that 6 registers

be updated.

To coordinate the volume adjustment of multiple channels simultaneously, the TAS5036A performs a delayed

volume update upon receiving a volume change command. Following the completion of the register volume

write operations, the TAS5036A waits for 5 ms for another volume command to be given. If no volume

command is issued in that period of time, the TAS5036A starts adjusting the volume of the channels that

received volume settings.

While a volume update is being performed, the system status register indicates that the update is in progress.

During the update, all subsequent volume control setting requests that are sent to the TAS5036A are received

and stored as a single next value for a subsequent update. If more than one volume setting request is sent,

only the last is retained.

Table 2−9. Volume Register

VOLUME REGISTER

Vol

Bit 7

Vol

Bit 6

Vol

Bit 5

Vol

Bit 4

Vol

Bit 3

Vol

Bit 2

Vol

Bit 1

Vol

Bit 0

2.3.2 Mute

The application of mute ramps the volume from any setting to the noiseless hard-mute state. There are two

methods in which the TAS5036A can be placed into mute. The TAS5036A is placed in the noiseless mute when

the MUTE terminal is asserted low for a minimum of 3 MCLK_IN cycles. Alternatively, the mute mode can be

initiated by setting the mute bit in the system control register through the serial control interface. The

TAS5036A is held in mute state as long as the terminal is low or I2C mute setting is active. This command uses

quiet entry and exit sequences to and from the hard-mute state.

TAS5036AIPFC Datasheet(PDF) 25 Page - Texas Instruments

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