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RT5133WSC Datasheet(PDF) 27 Page - Richtek Technology Corporation |
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RT5133WSC Datasheet(HTML) 27 Page - Richtek Technology Corporation |
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27 / 41 page ![]() R RT5133 Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS5133-02 February 2021 www.richtek.com 27 Address Reg Name Bit Bit Name Default Type Description 0x16 BASE_MASK 7 VDDAUV_MASK 0 RW VDDAUV mask 0 : Interrupt is not masked (default) 1 : Interrupt is masked 6 VREF_MASK 1 RW BASE VREF mask 0 : Interrupt is not masked 1 : Interrupt is masked (default) 5:3 Reserved 111 RW 2 OTP2_MASK 1 RW OTP2 mask 0 : Interrupt is not masked 1 : Interrupt is masked (default) 1 OTP1_MASK 1 RW OTP1 mask 0 : Interrupt is not masked 1 : Interrupt is masked (default) 0 OTP0_MASK 1 RW OTP0 mask 0 : Interrupt is not masked 1 : Interrupt is masked (default) |
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