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AS7030B Datasheet(PDF) 117 Page - ams AG |
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AS7030B Datasheet(HTML) 117 Page - ams AG |
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117 / 129 page  Document Feedback AS7030B Functional Description Datasheet • PUBLIC DS000716 • v1-00 • 2020-Jun-10 128 │ 116 Addr: 0x0d GPIO_SR Bit Bit Name Default Access Bit Description 3 gpio3_sr 0 RW GPIO3 slew rate configuration 0: Default slew rate 1: Increased slew rate 2 gpio2_sr 0 RW GPIO2 slew rate configuration 1 gpio1_sr 0 RW GPIO1 slew rate configuration 0 gpio0_sr 0 RW GPIO0 slew rate configuration GPIO_SYNC (Address 0x0f) Figure 159: GPIO_SYNC Register Addr: 0x0f GPIO_SYNC Bit Bit Name Default Access Bit Description 7:3 Not used 0 RW Not used 2 gpio_edge 0 RW Used edge on selected GPIO for synchronization. 0: posedge 1: negedge 1:0 gpio_select 0 RW 0: GPIO0 1: GPIO1 2: GPIO2 3: GPIO3 An external synchronization signal can be used to start the sequencer for an ADC cycle. The synchronization signal is available via a GPIO. The used GPIO and Edge (positive, negative or both) can be programmed. |
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