Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

WM8776 Datasheet(PDF) 16 Page - Wolfson Microelectronics plc

Part # WM8776
Description  24-bit, 192kHz Stereo CODEC with 5 Channel I/P Multiplexer
PDF  57 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8776 Datasheet(HTML) 16 Page - Wolfson Microelectronics plc

Back Button WM8776 Datasheet HTML 12Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 13Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 14Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 15Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 16Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 17Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 18Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 19Page - Wolfson Microelectronics plc WM8776 Datasheet HTML 20Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 57 page
background image
WM8776
Production Data
w
PD Rev 4.0 April 2005
16
DEVICE DESCRIPTION
INTRODUCTION
WM8776 is a complete 2-channel DAC, 2-channel ADC audio CODEC, with flexible input multiplexor
including digital interpolation and decimation filters, multi-bit sigma delta stereo ADC, and switched
capacitor multi-bit sigma delta DACs with analogue volume controls on each channel and output
smoothing filters. It is available in a single package and controlled by either a 3-wire or 2-wire
software interface. The 3-wire interface is compatible with the SPI standard.
An analogue bypass path option is available, to allow stereo analogue signals from any of the 5
stereo inputs to be sent to the stereo outputs via the main volume controls. This allows a purely
analogue input to analogue output high quality signal path to be implemented if required.
The DAC and ADC have separate left/right clocks, bit clocks, master clocks and data I/Os. The
Audio Interface may be configured to operate in either master or slave mode. In Slave mode
ADCLRC, DACLRC, ADCBCLK and DACBCLK are all inputs. In Master mode ADCLRC, DACLRC,
ADCBCLK and DACBCLK are outputs.
The input multiplexor to the ADC is configured to allow large signal levels to be input to the ADC,
using external resistors to reduce the amplitude of larger signals to within the normal operating range
of the ADC. The ADC has an analogue input PGA and a digital gain control, accessed by one
register write. The input PGA allows input signals to be gained up to +24dB and attenuated down to
-21dB in 0.5dB steps. The digital gain control allows attenuation from -21.5dB to -103dB in 0.5dB
steps. This allows the user maximum flexibility in the use of the ADC.
The DAC has its own digital volume control, which is adjustable between 0dB and -127.5dB in 0.5dB
steps. There is also an analogue volume control on the headphone outputs, which is adjustable
between +6dB and -73dB in 1dB steps. The analogue and digital volume controls may be operated
independently. In addition a zero cross detect circuit is provided for both analogue and digital volume
controls. When analogue volume zero-cross detection is enabled the attenuation values are only
updated when the input signal to the gain stage is close to the analogue ground level. The digital
volume control detects a transition through the zero point before updating the volume. This
minimises audible clicks and ‘zipper’ noise as the gain values change.
The DAC output incorporates an input selector and mixer allowing a signal to be either switched into
the signal path in place of the DAC signal or mixed with the DAC signal before the volume control.
Use of external resistors allows larger input levels to be accepted by the device, giving maximum
user flexibility.
Internal functionality is controlled by CE, CL, DI and MODE input pins. The MODE pin determines
which of the two control interface modes is selected.
Operation using system clock of 128fs, 192fs, 256fs, 384fs, 512fs or 768fs is provided. In Slave
mode selection between clock rates is automatically controlled. In master mode the master clock to
sample rate ratio is set by control bits ADCRATE and DACRATE. ADC and DAC may run at different
rates and have their own bit clocks and master clocks.
The audio data interface supports right, left and I
2S interface formats along with a highly flexible DSP
serial port interface.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com