WM8776 datasheet(32/57 Pages) WOLFSON

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WM8776

Production Data

PD Rev 4.0 April 2005

L/RDA[7:0]

ATTENUATION LEVEL

00(hex)

∞ dB (mute)

01(hex)

-127dB

FE(hex)

-0.5dB

FF(hex)

0dB

Table 14 Digital Volume Control Attenuation Levels

The digital volume control also incorporates a zero cross detect circuit which detects a transition

through the zero point before updating the digital volume control with the new volume. This is

enabled by control bit DZCEN.

BIT

LABEL

DEFAULT

DESCRIPTION

R7 (07h)

0000111

DAC Control

DZCEN

DAC Digital Volume Zero Cross

Enable:

0: Zero cross detect disabled

1: Zero cross detect enabled

DAC OUTPUT PHASE

The DAC Phase control word determines whether the output of the DAC is non-inverted or inverted

BIT

LABEL

DEFAULT

DESCRIPTION

Bit

DAC

Phase

DACL

1 = invert

R6 (06h)

0000110

DAC Phase

1:0

PH[1:0]

DACR

1 = invert

ADC GAIN CONTROL

The ADC has an analogue input PGA and digital gain control for each stereo channel. Both the

analogue and digital gains are adjusted by the same register, LAG for the left and RAG for the right.

The analogue PGA has a range of +24dB to -21dB in 0.5dB steps. The digital gain control allows

further attenuation (after the ADC) from -21.5dB to -103dB in 0.5dB steps. Table 15 shows how the

LAG/RAG[7:0]

ATTENUATION

LEVEL (AT

OUTPUT)

ANALOGUE PGA

DIGITAL

ATTENUATION

00(hex)

∞ dB (mute)

-21dB

Digital mute

01(hex)

-103dB

-21dB

-82dB

A4(hex)

-21.5dB

-21dB

-0.5dB

A5(hex)

-21dB

0dB

CF(hex)

0dB

FE(hex)

+23.5dB

0dB

FF(hex)

+24dB

0dB

Table 15 Analogue and Digital Gain Mapping for ADC

In addition, a zero cross detect circuit is provided for the input PGA, controlled by bit 8 in each

attenuation register. This minimises audible clicks and ‘zipper’ noise by updating the gain when the

signal crosses the zero level.

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