AD8315

Rev. C | Page 20 of 24

ANTENNA

STRIPLINE

PA

AD8315

RFIN

Figure 42. Series Attention Input Coupling Option

Figure 42 shows a third method for coupling the input

signal into the AD8315. A series resistor, connected to the RF

source, combines with the input impedance of the AD8315 to

resistively divide the input signal being applied to the input.

This has the advantage of very little power being tapped off in

RF power transmission applications.

USING THE CHIP SCALE PACKAGE

On the underside of the chip scale package, there is an exposed

paddle. This paddle is internally connected to the chip’s ground.

There is no thermal requirement to solder the paddle down to

the printed circuit board’s ground plane. However, soldering

down the paddle has been shown to increase the stability over

frequency of the AD8315 ACP’s response at low input power

levels (that is, at around −45 dBm) in the DCS and PCS bands.

EVALUATION BOARD

Figure 43 shows the schematic of the AD8315 MSOP evaluation

board. The layout and silkscreen of the component side are

shown in Figure 44 and Figure 45. An evaluation board is also

available for the LFCSP package (see the Ordering Guide for

exact part numbers). Apart from the slightly smaller device

footprint, the LFCSP evaluation board is identical to the MSOP

board. The board is powered by a single supply in the 2.7 V to

5.5 V range. The power supply is decoupled by a single 0.1 μF

capacitor.

Table 5 details the various configuration options of the

evaluation board.

1

2

3

4

5

6

7

8

C1

0.1µF

TP1

R3

0Ω

R4

(OPEN)

C2

(OPEN)

TP2

RFIN

ENBL

VSET

FLTR

VPOS

VAPC

NC

COMM

AD8315

R1

0Ω

SW1

J1

J2

RFIN

VSET

C4

(OPEN)

LK1

LK2

NC = NO CONNECT

C5

0.1µF

R8

10kΩ

C3

0.1µF

R7

16.2kΩ

R6

17.8kΩ

R5

10kΩ

AD8031

R2

52.3Ω

J2

VAPC

Figure 43. Evaluation Board Schematic (MSOP)

Table 5. Evaluation Board Configuration Options

Component

Function

Default Condition

TP1, TP2

Supply and Ground Vector Pins.

Not Applicable

SW1

Device Enable. When in Position A, the ENBL pin is connected to VPOS and the AD8315 is

in operating mode. In Position B, the ENBL pin is grounded putting the device in power-down mode.

SW1 = A

R1, R2

Input Interface. The 52.3 Ω resistor in Position R2 combines with the AD8315’s internal input

impedance to give a broadband input impedance of around 50 Ω. A reactive match can be

implemented by replacing R2 with an inductor and R1 (0 Ω) with a capacitor. Note that the

AD8315’s RF input is internally ac-coupled.

R2 = 52.3 Ω (Size 0603)

R1 = 0 Ω (Size 0402)

R3, R4, C2

Output Interface. R4 and C2 can be used to check the response of VAPC to capacitive and resistive

loading. R3/R4 can be used to reduce the slope of VAPC.

R4 = C2 = Open (Size 0603)

R3 = 0 Ω (Size 0603)

C1

Power Supply Decoupling. The nominal supply decoupling consists of a 0.1 μF capacitor.

C1 = 0.1 μF (Size 0603)

C4

Filter Capacitor. The response time of VAPC can be modified by placing a capacitor between

FLTR (Pin 4) and ground.

C4 = Open (Size 0603)

LK1, LK2

Measurement Mode. A quasimeasurement mode can be implemented by installing LK1 and LK2

(connecting an inverted VAPC to VSET) to yield the nominal relationship between RFIN and VSET.

In this mode, a large capacitor (0.01 μF or greater) must be installed in C4.

LK1, LK2 = Installed