AT43USB325E-AC datasheet(24/109 Pages) ATMEL

24 / 109 page

3355C–USB–4/05

AT43USB325

– Separated reset: A USB bus reset will only reset the USB hardware, while an

interrupt to the microcontroller will be generated if the BUS INT MSK bit, bit 3 of

SPRSMSK register, is also set.

When the USB hardware is reset, the compound device is de-configured and has to be re-enu-

merated by the host. When the microcontroller is reset, all I/O registers are then set to their initial

values, and the program starts execution from address $000. The instruction placed in address

$000 must be a JMP instruction to the reset handling routine. If the program never enables an

interrupt source, the interrupt vectors are not used, and regular program code can be placed at

these locations. The circuit diagram in Figure 4-3 shows the reset logic.

Figure 4-3.

Reset Logic

4.6

Power-on Reset

A Power-on Reset (POR) circuit ensures that the device is reset from power-on. An internal

timer clocked from the Watchdog timer oscillator prevents the MCU from starting until after a cer-

tain period after V

CC has reached the power-on threshold voltage, regardless of the VCC rise

time.

If the build-in start-up delay is sufficient, RESET can be connected to V

CC directly or via an

external pull-up resistor. By holding the pin low for a period after V

CC has been applied, the

Power-on Reset period can be extended.

FSTRT

Cntr Reset

USB Reset

POR Ckt

Reset Ckt

Watchdog Timer

Divider

14-bit Cntr

VCC

RSTN

1-MHz Clock

AT43USB325E-AC Datasheet(PDF) 24 Page - ATMEL Corporation