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TMP112A Datasheet(PDF) 10 Page - Guangdong Youtai Semiconductor Co., Ltd. |
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TMP112A Datasheet(HTML) 10 Page - Guangdong Youtai Semiconductor Co., Ltd. |
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10 / 17 page ![]() Figure 6. Two-wire Read Command Timing Diagram When writing data to the TMP112A , after the slave address byte is sent, accessing a particular register on the TMP112A is accomplished by writing the appropriate value to the pointer register. Every write operation to the TMP112A requires a value for the pointer register. When reading from the TMP112A device, after the slave address byte is sent, the corresponding pointer register byte also needs to be sent. Unlike the write operation, if the user need to repeatedly read data from the same register, it is not required to send the pointer register byte separately each time, the last value stored in the pointer register will be read by the device automatically; to change the register pointer for a read operation, a new value must be written to the pointer register. The action is accomplished by issuing a slave-address byte with the R/W bit low, followed by the pointer register byte. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. Register bytes are sent with the MSB first, followed by the LSB. Figure 5 and Figure 6 show schematic diagrams of the above read and write operations. SMBus Alert Function The TMP112A supports the SMBus alert function. When the TMP112A operates in interrupt mode (TM=1), the mas- ter can send out and SMBus ALERT command (19h) to the bus. If the ALERT pin is active, the device acknowled- ges the SMBus ALERT command and responds by returning the slave address. The eighth bit (LSB) of the slave add- ress byte indicates if the alert condition is caused by the temperature exceeding THIGH or falling below TLOW. This bit is equal to POL if the temperature is greater than or equal to THIGH; this bit is equal to POL if the temperature is less than TLOW. If multiple devices on the bus respond to the SMBus ALERT command, the bus will return the lowest two-wire address. The TMP112A ALERT pin becomes inactive at the completion of the SMBus ALERT command; the ALERT pin of the TMP112A that does not return an address will remain active. Sending the SMBus ALERT com- mand again can continue to clear the ALERT pin of the TMP112A with the current lowest address. The above process is detailed in Figure 7. D7 D6 D5 D4 ACK by Master Frame 5 Data-Byte 2 Read Register 1 9 D3 D2 D1 D0 STOP By Master SCL (Continued) SDA (Continued) www.umw-ic.com 10 友台半导体有限公司 From UMW R TMP112A |
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