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EXAMPLE BOARD LAYOUT

.000 PKG

0

0.05 MAX

ALL AROUND

0.05 MIN

ALL AROUND

(0.4) KEEP OUT AREA

(0.62)

KEEP OUT

AREA

(1.295)

(

)

1.9

2X (

)

1.85

2X (

)

0.775

2X (

)

0.425

2X (

)

1.775

2X (

)

1.5

2X ( )

1

2X (

)

0.085

2X (

)

0.415

2X (

)

0.915

2X (

)

1.415

4X (

)

0.165

4X (

)

0.665

4X (

)

1.165

12X (0.25)

3X (0.6)

3X (0.22)

2X (

)

1.195

(R0.05) TYP

2X (

)

1.572

(

0.2) TYP

VIA

QFN-FCMOD - 2.1 mm max height

RDX0007A

PLASTIC QUAD FLATPACK - NO LEAD

4229109/A 10/2022

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

LAND PATTERN EXAMPLE

SCALE: 25X

1

2

3

4

5

7

METAL UNDER

SOLDER MASK

TYP

SOLDER MASK

OPENING

TYP

METAL EDGE

SOLDER MASK

OPENING

EXPOSED

METAL

NON SOLDER MASK

DEFINED

PADS: 5-8

SOLDER MASK DETAILS

METAL UNDER

SOLDER MASK

SOLDER MASK

OPENING

EXPOSED

METAL

SOLDER MASK

DEFINED

PADS: 1-4