MP1048 – FULL BRIDGE CCFL CONTROLLER

MP1048 Rev. 0.9

www.MonolithicPower.com

9

9/24/2007

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

© 2007 MPS. All Rights Reserved.

APPLICATION INFORMATION

Pin 1 (SI), R1:

Secondary Short Protection: R1 is used for

feedback to the SI pin to detect excessive

secondary current. The value for R1 is calculated

as 1.2V divided by the secondary peak current.

Pin 2 (LV): C13, C14 and R8:

Open Lamp protection: The regulated open

lamp voltage is proportional to the C14 and C13

ratio. C13 has to be rated at 3kV and is typically

between 5pF to 22pF. The value of C14 is set

by the customer to achieve the required open

lamp voltage detection value.

()rms

V

18

.

1

13

C

14

C

MAX

×

×

=

The value of bias resistor R8 is typically 100kΩ

(not critical).

Pin 2 (LI), R2:

Lamp Current Regulation: R2 is used for

feedback to the LI pin to regulate the lamp

current. The value for R2 is calculated as 1.33V

divided by the lamp rms current (assuming

VABRT is greater than 1.2V). For a RMS 6mA

lamp current, the R2 value is 220Ω.

Pin 6 (FT), C2:

C2 is used to set the fault timer. This capacitor

will determine when the chip will reach the fault

threshold value.

Open Lamp Time Out:

()

V

2

.

1

A

1

t

nF

2

C

LAMP

OPEN

µ

×

=

For C2 = 820nF, then the timeout for open lamp

will be 0.98 sec.

Secondary Over Current Timeout: When the

MP1048 is regulating secondary over current

(SI feedback), the source current in the Fault

Timer (FT) cap is approximately 65µA. This

causes the SI timeout to be about 1/65 of the

Open Lamp (LV) timeout. To reduce the SI

timeout further, modify the network at the FT

pin as shown in Figure 3.

FT

C2A

C2B

Figure 3—Timeout Adjustment

For a C2B = 10nF, then the time out for

secondary short will be 0.2ms.

Note: The open lamp time out will remain the

same value as defined by C2A.

Pin 7 (LCS), R3:

R3 is used to set the lamp operating clock. The

value for R3 is calculated by

ο

=

f

e

5

3

R

9

For R3 = 100kΩ, operating clock will be 50KHz.

Pin 8 (LCC):

This is the lamp clock control compensation pin

and needs a lag lead lag capacitor/resistor

network.

Pin 4 (COMP), C1:

C1 is the feedback compensation capacitor that

connects between COMP and AG. A 1.5nF or

2.2nF cap is recommended. This cap should be

X7R ceramic. The value of C1 affects the

soft-on rise time and soft-off fall time.

Pin 18 (OUTR), Pin 25 (OUTL), C12, R9:

The OUTR and OUTL pins are used to sense

the voltage at the output of the full bridge. They

are also the point of access for the output

dampers. OUTR and OUTL should make a

Kelvin connection to the sources of the

high-side MOSFETs and the drains of the

low-side MOSFETs in the output bridge.

The primary transformer current flows through

capacitor C12. Its value is typically 2.2µF. This

capacitor should be ceramic and has a ripple

current rating greater than the primary current.

It is more optimal to use two parallel 1µF

ceramic caps for minimal ESR losses. R9 is

used to ensure that the bridge outputs are at 0V

prior to startup. Typically R9 = 300Ω to 3kΩ.