PCE84C486 datasheet(8/36 Pages) PHILIPS

8 / 36 page

1996 Feb 21

Philips Semiconductors

Objective speciﬁcation

Microcontrollers for digital auto-sync and

VST TV controller applications

PCE84C486; PCE84C487

Table 2

SDIP42 package

SYMBOL

DESCRIPTION

DP20/SDA

Derivative port line 20 or I2C-bus data line.

P10/SCL

Port line 10 or I2C-bus clock line or emulation input DXWR.

P11

Port line 11 or emulation input DXRD.

DP13/PWM8

Derivative I/O port 13 or PWM8 output.

P12

Port line 12 or emulation input DXALE.

n.c.

Not connected.

8-bit counter input (Schmitt trigger).

DP24/PWM10 to DP27/PWM13

8, 14, 29, 34

Derivative I/O ports or 8-bit PWM outputs.

P14

Port line 14 or emulation output DXINT.

P00 to P07

10, 12, 13, 15,

17, 18, 19, 20

General I/O port lines.

RSTO

Used for emulation purposes only. This active HIGH output is the

result of the OR operation carried out internally on the RESET

input and the Watchdog Timer reset line.

n.c.

Not connected.

VSS

Ground pin.

DP11/ADC1

Derivative I/O port 11 or ADC channel 1 input.

DP04/PWM4 to DP07/PWM7

25, 24, 23, 42

Derivative I/O ports or 6-bit PWM outputs.

n.c.

Not connected.

DP00/PWM0 to DP03/PWM3

31, 30, 28, 26

Derivative I/O ports or 7-bit PWM outputs.

EMU

Emulation mode control input, normally LOW.

VDD

Power supply.

XTAL1 (IN)

Oscillator input pin for system clock.

XTAL2 (OUT)

Oscillator output pin for system clock.

n.c.

Not connected.

RESET

Reset input; active LOW input initializes device.

Direct testable pin or event counter input.

INTN/T0

External interrupt or direct testable pin.

DP12/ADC2

Derivative I/O port 12 or ADC Channel 2 input.

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