ST92F124 datasheet(370/429 Pages) STMICROELECTRONICS

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10-BIT ANALOG TO DIGITAL CONVERTER (ADC)

COMPARE RESULT REGISTER (CRR)

R243 - Read/Write

Reset Value: 0000 xxxx (0xh)

Two adjacent channels (identified as A and B) can

be selected through CLR1 register programming

(bits CC[3:0]); a level window for the converted an-

alog input can be defined on these channels.

Bits 7 = CBU: Compare Register Ch. B Upper

Threshold

Set when converted data on channel B is greater

than the threshold value set in UTBHR/UTBLR

registers.

Bits 6 = CAU: Compare Register Ch. A Upper

Threshold

Set when converted data on channel A is greater

than the threshold value set in UTAHR/UTALR

registers.

Bits 5 = CBL: Compare Register Ch. B Lower

Threshold

Set when converted data on channel B is less than

the threshold value set in LTBHR/LTBLR regis-

ters.

Bits 4 = CAL: Compare Register Ch. A Lower

Threshold

Set when converted data on channel A is less than

the threshold value set in LTAHR/LTALR regis-

ters.

Bits 3:0 = Don’t care

LOWER

THRESHOLD

REGISTERS

(LTiHR/

LTiLR)

The two pairs of Lower Threshold High/Low regis-

ters are used to store the user programmable low-

er threshold 10-bit values, to be compared with the

current conversion results, thus setting the lower

window limit.

CHANNEL A LOWER THRESHOLD HIGH

R244 - Read

Reset Value: undefined

Bits 7:0 = LTA.[9:2]: Channel A [9:2] bit Lower

Threshold

CHANNEL A LOWER THRESHOLD LOW

R245 - Read/Write

Reset Value: xx00 0000

Bits 7:6 = LTA.[1:0]: Channel A [1:0] bit Lower

Threshold

Bits 5:0 = Reserved, forced by hardware to 0.

CHANNEL B LOWER THRESHOLD HIGH REG-

ISTER (LTBHR)

R246 - Read/Write

Reset Value: undefined

Bits 7:0 = LTB.[9:2]: Channel B [9:2] bit Lower

Threshold

CBU

CAU

CBL

CAL

LTA.9 LTA.8 LTA.7 LTA.6 LTA.5 LTA.4 LTA.3 LTA.2

LTA.1 LTA.0

000

LTB.7 LTB.7 LTB.5 LTB.4 LTB.3 LTB.2 LTB.1 LTB.0

ST92F124 Datasheet(PDF) 370 Page - STMicroelectronics

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