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PCF2131 Datasheet(PDF) 22 Page - NXP Semiconductors

Part # PCF2131
Description  Nano-power highly accurate RTC with integrated quartz crystal
PDF  85 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF2131 Datasheet(HTML) 22 Page - NXP Semiconductors

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NXP Semiconductors
PCF2131
Nano-power highly accurate RTC with integrated quartz crystal
The output pin BBS can be used as a supply for external devices with battery backup needs, such as SRAM
(see [1]).
7.6 Oscillator stop detection function
The PCF2131 has an on-chip oscillator detection circuit which indicates the status of the oscillation by
monitoring the supply of oscillator: whenever the supply is out of the expected range, a reset occurs and the
oscillator stop flag OSF (in register Seconds) is set logic 1.
• Power-on:
1. The oscillator is not running, the chip is in reset (OSF is logic 1).
2. When the oscillator starts running and supply is OK after power-on, the chip exits from reset.
3. The flag OSF is still logic 1 and can be cleared (OSF set logic 0) by command.
• Power supply failure:
1. When the power supply of the chip drops below a certain value (Vlow), typically 1.2 V, the oscillator supply
also fails and a reset occurs.
2. When the power supply returns to normal operation, the oscillator supply is OK again, the chip exits from
reset.
3. The flag OSF is still logic 1 and can be cleared (OSF set logic 0) by command.
4. When OSF flag is cleared an OTP refresh should be performed (see Section 7.3.2).
001aaj409
(1)
Vth(sw)bat
(= 2.5 V)
VSS
VBAT
VBAT
Vlow
(= 1.2 V)
VDD
Voper(int)
Voper(int)
Voper(int)
VDD
VDD
VBAT
VSS
(2)
OSF
battery discharge
VDD
1. Theoretical state of the signals since there is no power.
2. The oscillator stop flag (OSF), set logic 1, indicates that the oscillation has stopped and a reset has occurred since the
flag was last cleared (OSF set logic 0). In this case, the integrity of the clock information is not guaranteed. The OSF
flag is cleared by command.
Figure 8. Power failure event due to battery discharge: reset occurs
7.7 Power-On Reset function
The PCF2131 has a Power-On Reset (POR) and a Power-On Reset Override (PORO) function implemented.
7.7.1 Power-On Reset (POR)
The POR is active whenever the oscillator is stopped. The oscillator is considered to be stopped during the time
between power-on and stable crystal resonance (see Figure 9). This time may be in the range of 200 ms to 2 s
PCF2131
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 2.0 — 5 October 2023
22 / 85



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