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7.2.12 Energy Detect Control (EDCR)

Table 32. Energy Detect Control (EDCR), address 0x1D

Bit

Bit Name

Default

Description

ED_EN

0, RW

Energy Detect Enable:

Allow Energy Detect Mode.

When Energy Detect is enabled and Auto-Negotiation is disabled

via the BMCR register, Auto-MDIX should be disabled via the PHY-

CR register.

ED_AUTO_UP

1, RW

Energy Detect Automatic Power Up:

Automatically begin power up sequence when Energy Detect Data

Threshold value (EDCR[3:0]) is reached. Alternatively, device

could be powered up manually using the ED_MAN bit (ECDR[12]).

ED_AUTO_DOWN

1, RW

Energy Detect Automatic Power Down:

Automatically begin power down sequence when no energy is de-

tected. Alternatively, device could be powered down using the

ED_MAN bit (EDCR[12]).

ED_MAN

0, RW/SC

Energy Detect Manual Power Up/Down:

Begin power up/down sequence when this bit is asserted. When

set, the Energy Detect algorithm will initiate a change of Energy De-

tect state regardless of threshold (error or data) and timer values.

In managed applications, this bit can be set after clearing the Ener-

gy Detect interrupt to control the timing of changing the power

state.

ED_BURST_DIS

0, RW

Energy Detect Bust Disable:

Disable bursting of energy detect data pulses. By default, Energy

Detect (ED) transmits a burst of 4 ED data pulses each time the CD

is powered up. When bursting is disabled, only a single ED data

pulse will be send each time the CD is powered up.

ED_PWR_STATE

0, RO

Energy Detect Power State:

Indicates current Energy Detect Power state. When set, Energy

Detect is in the powered up state. When cleared, Energy Detect is

in the powered down state. This bit is invalid when Energy Detect

is not enabled.

ED_ERR_MET

0, RO/COR

Energy Detect Error Threshold Met:

No action is automatically taken upon receipt of error events. This

bit is informational only and would be cleared on a read.

ED_DATA_MET

0, RO/COR

Energy Detect Data Threshold Met:

The number of data events that occurred met or surpassed the En-

ergy Detect Data Threshold. This bit is cleared on a read.

7:4

ED_ERR_COUNT

0001, RW

Energy Detect Error Threshold:

Threshold to determine the number of energy detect error events

that should cause the device to take action. Intended to allow aver-

aging of noise that may be on the line. Counter will reset after ap-

proximately 2 seconds without any energy detect data events.

3:0

ED_DATA_COUNT

0001, RW

Energy Detect Data Threshold:

Threshold to determine the number of energy detect events that

should cause the device to take actions. Intended to allow averag-

ing of noise that may be on the line. Counter will reset after approx-

imately 2 seconds without any energy detect data events.

DP83848C Datasheet(PDF) 60 Page - National Semiconductor (TI)

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