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TMD2772 Datasheet(PDF) 34 Page - OSRAM GmbH |
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TMD2772 Datasheet(HTML) 34 Page - OSRAM GmbH |
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34 / 60 page ![]() ams Datasheet Page 33 [v1-21] 2016-Feb-16 Document Feedback TMD2772/ TMD2772WA − Register Description Proximity Time Register (0x02) The Proximity Time Register controls the integration time of the proximity ADC in 2.73 ms increments. Time is expressed as a 2’s complement number. It is recommended that this register be programmed to a value of 0xFF (1 integration cycle). Figure 35: Proximity Time Register Wait Time Register (0x03) Wait time is set in 2.73 ms increments unless the WLONG bit is asserted in which case the wait times are 12 x longer. WTIME is programmed as a 2’s complement number. Figure 36: Wait Time Register Note(s): 1. The Proximity Wait Time Register should be configured before PEN and/or AEN is/are asserted. 76 5 4 3 2 1 0 PTIME Field Bits Description (Reset value = 0xFF) Value Cycles Time Max Count PTIME 7:0 0xFF 1 2.73 ms 1023 76 5 4 3 2 1 0 WTIME Field Bits Description (Reset value = 0xFF) Register Value Wait Time Time (WLONG=0) Time (WLONG=1) WTIME 7:0 0xFF 1 2.73 ms 0.033 s 0xB6 74 202 ms 2.4 s 0x00 256 699 ms 8.4 s |
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