TMD37253 datasheet(25/56 Pages) OSRAM

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[v2-00] 2023-Mar-21

TMD3725 − Register Description

PIHT Register (Address 0x8A)

Figure 29:

PIHT Register

The proximity channel is compared against high-going 8-bit

threshold value set by PIHT.

If the value generated by the proximity channel is above the

PIHT threshold and the PPERS value is reached, the PINT bit is

asserted. If PIEN is set, then the INT pin will also assert.

PERS Register (Address 0x8C)

Figure 30:

PERS Register

Addr: 0x8A

PIHT

Bit

Bit Name

Default

Access

Bit Description

7:0

PIHT

0x00

This register sets the proximity ADC channel high

threshold.

Addr: 0x8C

PERS

Bit

Bit Name

Default

Access

Bit Description

7:4

PPERS

0000

This register sets the proximity persistence filter.

Value

Interrupt

Every proximity cycle

Any value outside PILT/PIHT thresholds

2 consecutive proximity values out of range

3 consecutive proximity values out of range

…….

15 consecutive proximity values out of range

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