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DSP56362P Datasheet(PDF) 96 Page - Freescale Semiconductor, Inc |
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DSP56362P Datasheet(HTML) 96 Page - Freescale Semiconductor, Inc |
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96 / 152 page ![]() JTAG Timing DSP56362 Technical Data, Rev. 4 3-70 Freescale Semiconductor Figure 3-48 GPIO Timing 3.18 JTAG Timing Table 3-28 JTAG Timing1, 2 No. Characteristics All Frequencies Unit Min Max 500 TCK frequency of operation (1/(T C × 3); maximum 22 MHz) 0.0 22.0 MHz 501 TCK cycle time in Crystal mode 45.0 — ns 502 TCK clock pulse width measured at 1.5 V 20.0 — ns 503 TCK rise and fall times 0.0 3.0 ns 504 Boundary scan input data setup time 5.0 — ns 505 Boundary scan input data hold time 24.0 — ns 506 TCK low to output data valid 0.0 40.0 ns 507 TCK low to output high impedance 0.0 40.0 ns Valid GPIO (Input) GPIO (Output) CLKOUT (Output) Fetch the instruction MOVE X0,X:(R0); X0 contains the new value of GPIO and R0 contains the address of GPIO data register. A0–A17 490 491 492 494 493 AA0495 GPIO (Output) 495 496 |
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