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M68HC11K Datasheet(PDF) 65 Page - Freescale Semiconductor, Inc |
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M68HC11K Datasheet(HTML) 65 Page - Freescale Semiconductor, Inc |
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65 / 290 page  Operating Modes and On-Chip Memory Control Registers M68HC11K Family Technical Data MOTOROLA Operating Modes and On-Chip Memory 65 NOTE: Throughout this manual, the registers are discussed by function. In the event that not all bits in a register are referenced, the bits that are not discussed are shaded. Addr. Register Name Bit 7 6 5 4 3 2 1 Bit 0 $0000 Port A Data Register (PORTA) See page 138. Read: PA7PA6 PA5PA4 PA3PA2 PA1PA0 Write: Reset: Undefined after reset $0001 Port A Data Direction Register (DDRA) See page 138. Read: DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 Write: Reset: 00 00 00 00 $0002 Port B Data Direction Register (DDRB) See page 139. Read: DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 Write: Reset: 00 00 00 00 $0003 Port F Data Direction Register (DDRF) See page 144. Read: DDF7 DDF6 DDF5 DDF4 DDF3 DDF2 DDF1 DDF0 Write: Reset: 00 00 00 00 $0004 Port B Data Register (PORTB) See page 139. Read: PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 Write: Reset: Undefined after reset $0005 Port F Data Register (PORTF) See page 144. Read: PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0 Write: Reset: Undefined after reset $0006 Port C Data Register (PORTC) See page 140. Read: PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 Write: Reset: Undefined after reset $0007 Port C Data Direction Register (DDRC) See page 141. Read: DDC7 DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 Write: Reset: 00 00 00 00 $0008 Port D Data Register (PORTD) See page 142. Read: 0 0 PD5 PD4 PD3 PD2 PD1 PD0 Write: Reset: 0 0 UU UU U U $0009 Port D Data Direction Register (DDRD) See page 142. Read: 0 0 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 Write: Reset: 00 00 00 00 = Unimplemented R = Reserved U = Undefined Figure 4-1. Register and Control Bit Assignments (Sheet 1 of 11) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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