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DS80512D-page 7

PIC18(L)F23/24/43/44K22

RB6/KBI2/PGC

RB6

01

O

DIG

LATB<6> data output; not affected by analog input.

10

I

TTL

PORTB<6> data input; disabled when analog input

enabled.

IOC2

10

I

TTL

Interrupt-on-change pin.

TX2(3)

01

O

DIG

EUSART 2 asynchronous transmit data output.

CK2(3)

01

O

DIG

EUSART 2 synchronous serial clock output.

10

I

ST

EUSART 2 synchronous serial clock input.

PGC

xx

I

ST

In-Circuit Debugger and ICSPTM programming clock input.

RB7/KBI3/PGD

RB7

01

O

DIG

LATB<7> data output; not affected by analog input.

10

I

TTL

PORTB<7> data input; disabled when analog input

enabled.

IOC3

10

I

TTL

Interrupt-on-change pin.

RX2(2), (3)

10

I

ST

EUSART 2 asynchronous receive data input.

DT2(2), (3)

01

O

DIG

EUSART 2 synchronous serial data output.

10

I

ST

EUSART 2 synchronous serial data input.

PGD

xx

O

DIG

In-Circuit Debugger and ICSPTM programming data output.

xx

I

ST

In-Circuit Debugger and ICSPTM programming data input.

TABLE 10-5:

PORTB I/O SUMMARY (CONTINUED)

Pin

Function

TRIS

Setting

ANSEL

Setting

Pin

Type

Buffer

Type

Description

Legend:

AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =

CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I2CTM

= Schmitt Trigger input with I2C.

Note 1:

Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are set.

2:

Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are clear.

3:

Function on PORTD and PORTE for PIC18(L)F4XK22 devices.