4 Pin Configuration and Functions

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1OE

1A

1Y

2OE

2A

2Y

GND

VCC

4OE

4A

4Y

3OE

3A

3Y

Figure 4-1. SN74LVC126A D, DB, DGV, NS, or

PW Package; 14-Pin SOIC, SSOP, TVSOP, SOP or

TSSOP (Top View)

1

14

7

8

2

3

4

5

6

13

12

11

10

9

4OE

4A

4Y

3OE

3A

1A

1Y

2OE

2A

2Y

Figure 4-2. SN74LVC126A BQA or RGY

Package;14-Pin WQFN or VQFN (Top View)

Table 4-1. Pin Functions

PIN

I/O(1)

DESCRIPTION

NO.

NAME

1

1OE

I

Output enable 1

2

1A

I

Gate 1 input

3

1Y

O

Gate 1 output

4

2OE

I

Output enable 2

5

2A

I

Gate 2 input

6

2Y

O

Gate 2 output

7

GND

—

Ground pin

8

3Y

O

Gate 3 output

9

3A

I

Gate 3 input

10

3OE

I

Output enable 3

11

4Y

O

Gate 4 output

12

4A

I

Gate 4 input

13

4OE

I

Output Enable 4

14

VCC

—

Power pin

Thermal pad

—

Connect the GND pin to the exposed thermal pad for correct operation. Connect the thermal pad to any

internal PCB ground plane using multiple vias for good thermal performance.

(1)

I = input, O = output, P = power, FB = feedback, GND = ground, N/A = not applicable

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SN74LVC126A

SCAS339T – MARCH 1994 – REVISED MAY 2024

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