8.2.2 Detailed Design Procedure

1. Recommended Input Conditions

• Rise time and fall time specifications: See (Δt/ΔV) in Recommended Operating Conditions.

• Specified high and low levels: See (VIH and VIL) in Recommended Operating Conditions.

• Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC.

2. Recommended Output Conditions

• Load currents must not exceed 25 mA per output and 50 mA total for the part.

• Outputs must not be pulled above 5.5 V.

8.2.3 Application Curve

Figure 8-2. Supply Current vs Input Frequency

8.3 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating in the

Recommended Operating Conditions.

Each VCC pin must have a good bypass capacitor to prevent power disturbance. For devices with a single

supply, 0.1 µF is recommended; if there are multiple VCC pins, then 0.01 µF or 0.022 µF is recommended for

each power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 µF

and a 1 µF are commonly used in parallel. The bypass capacitor must be installed as close to the power pin as

possible for best results.

8.4 Layout

8.4.1 Layout Guidelines

When using multiple bit logic devices, inputs must never float.

In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two

inputs of a triple-input and gate are used, or only 3 of the 4 buffer gates are used. Such input pins must not

be left unconnected because the undefined voltages at the outside connections result in undefined operational

states. Figure 8-3 specifies the rules that must be observed under all circumstances. All unused inputs of digital

logic devices must be connected to a high or low bias to prevent them from floating. The logic level that must be

applied to any particular unused input depends on the function of the device. Generally they are tied to GND or

VCC, whichever makes more sense or is more convenient. It is generally acceptable to float outputs, unless the

part is a transceiver.

SN74LVC126A

SCAS339T – MARCH 1994 – REVISED MAY 2024

www.ti.com

12

Submit Document Feedback

Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: SN74LVC126A