6.5 Electrical Characteristics (continued)

Over operating junction remperature range (TJ = –40°C to +125°C) and VIN = 2.7 V to 6 V. Typical values at VIN = 5 V and TJ

= 25°C. (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Tracking offset

VFB when VSS/TR = 0 V

±1

mV

VTH_PG

UVP Power-good threshold voltage; dc

level

VOUT rising (%VFB)

92%

95%

98%

VOUT falling (%VFB)

87%

90%

93%

VTH_PG

OVP Power-good threshold voltage; dc

level

VOUT rising (%VFB)

107%

110%

113%

VOUT falling (%VFB)

104%

107%

111%

VOL,PG

Low-level output voltage at PG

ISINK_PG = 2 mA

0.01

0.3

V

IIH,PG

Input leakage current into PG

VPG = 5 V

100

nA

tPG,DLY

PG deglitch time

for a high level to low level transition on

the Power-good output

40

µs

OUTPUT

VFB

Feedback voltage

0.6

V

Feedback voltage accuracy

PWM mode, VIN ≥ VOUT + 1 V

–1%

1%

PFM mode, VIN ≥ VOUT + 1 V, VOUT ≥ 1.5

V, Co,eff ≥ 47 µF

–1%

2%

PFM mode, VIN ≥ VOUT + 1 V, VOUT < 1.5

V, Co,eff ≥ 68 µF

–1%

2.5%

Feedback voltage accuracy with voltage

tracking

VIN ≥ VOUT + 1 V, VSS/TR = 0.3 V, PWM

mode

–5%

5%

IIH,FB

Input leakage current into FB

VFB = 0.6 V

1

70

nA

Load regulation

PWM mode

0.05

%/A

RDIS

Output discharge resistance

30

50

Ω

ton,min

Minimum on-time of high-side FET

VIN ≥ 3.3 V

45

67

ns

RDP

Dropout resistance TPSM82816SIE

100% mode

27

mΩ

RDP

Dropout resistance TPSM82814PVCA,

TPSM82816PVCA

100% mode

23

mΩ

ILIMH

High-side FET switch current limit

TPSM82814

DC value, VIN = 3 V to 6 V

5.3

7.2

8.4

A

ILIMH

High-side FET switch current limit

TPSM82816

DC value, VIN = 3 V to 6 V

7.3

9.2

10.4

A

ILIMNEG

Low-side FET negative current limit

DC value, MODE/SYNC = high

–3

A

TPSM82816

SLUSEY7A – DECEMBER 2022 – REVISED JUNE 2024

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