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S71PL129JC0 Datasheet(PDF) 119 Page - SPANSION |
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S71PL129JC0 Datasheet(HTML) 119 Page - SPANSION |
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119 / 153 page ![]() October 28, 2005 S71PL129Jxx_00_A8 S71PL129JC0/S71PL129JB0/S71PL129JA0 117 Advance Informatio n Deep ICC Characteristics (for 64Mb) Address Patterns for PAR (A3= 0, A4=1) (32M) Address Patterns for RMS (A3 = 1, A4 = 1) (32M) Item Symbol Test Array Partition Typ Max Unit PASR Mode Standby Current IPASR VIN = VCC or 0V, Chip Disabled, tA = 85°C None 10 µA 1/4 Array 60 1/2 Array 80 Full Array 120 Item Symbol Max Temperature Typ Max Unit Temperature Compensated Refresh Current ITCR 15°C 50 µA 45°C 60 70°C 80 85°C 120 Item Symbol Test Typ Max Unit Deep Sleep Current IZZ VIN = VCC or 0V, Chip in ZZ# mode, tA = 25°C 10 µA A2 A1 A0 Active Section Address Space Size Density 0 1 1 One-quarter of die 000000h - 07FFFFh 512Kb x 16 8Mb 0 1 0 One-half of die 000000h - 0FFFFFh 1Mb x 16 16Mb x 0 0 Full die 000000h - 1FFFFFh 2Mb x 16 32Mb 1 1 1 One-quarter of die 180000h - 1FFFFFh 512Kb x 16 8Mb 1 1 0 One-half of die 100000h - 1FFFFFh 1Mb x 16 16Mb A2 A1 A0 Active Section Address Space Size Density 0 1 1 One-quarter of die 000000h - 07FFFFh 512Kb x 16 8Mb 0 1 0 One-half of die 000000h - 0FFFFFh 1Mb x 16 16Mb 1 1 1 One-quarter of die 180000h - 1FFFFFh 512Kb x 16 8Mb 1 1 0 One-half of die 100000h - 1FFFFFh 1Mb x 16 16Mb |
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