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TDA1313 Datasheet(PDF) 7 Page - NXP Semiconductors |
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TDA1313 Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 15 page ![]() July 1993 7 Philips Semiconductors Objective specification Stereo continuous calibration DAC (CC-DAC) TDA1313; TDA1313T CHARACTERISTICS VDDD = VDDA = VDDO = 5 V; Tamb = 25 °C; measured in Fig.7; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD supply voltage 3.0 5.0 5.5 V IDD total supply current at code 0000H − 8.0 9.5 mA IDDD digital supply current at code 0000H; no clock running − 0.2 − mA IDDA analog supply current − 4.6 5.5 mA IDDO operational amplifier supply − 3.4 4 mA current PSRR power supply ripple rejection at code 0000H; note 1 − 30 − dB Digital inputs; pins WS, BCK, 4/8FSSEL, LRSEL/RSI and SI/LSI IIL input leakage current LOW VI = 0.V −− 10 µA IIH input leakage current HIGH VI = 5.5 V −− 10 µA fBCK clock frequency −− 18.4 MHz BR bit rate data input −− 18.4 Mbits/s fWS word select input frequency −− 384 kHz Timing (see Fig.4) tr rise time −− 12 ns tf fall time −− 12 ns tCY bit clock cycle time 54 −− ns tBCKH bit clock pulse width HIGH 15 −− ns tBCKL bit clock pulse width LOW 15 −− ns tSU;DAT data set-up time 12 −− ns tHD:DAT data hold time to bit clock 10 −− ns tHD:WS word select hold time 10 −− ns tSU;WS word select set-up time 12 −− ns |
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