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M66239FP Datasheet(PDF) 7 Page - Renesas Technology Corp |
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M66239FP Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 24 page ![]() M66239FP Rev.1.00 Mar 16, 2005 page 7 of 23 Sync. Clock Generation Operation Timing Trigger Mode 1 (Negative edge operation: MODE = "H") tsp(CKO) tss(CKO) ∆t ∆t Vcc 0V Vcc 0V VOH VOL VOH VOL VOH VOL ∆t tw(TR) 1/fIN tsp(CKO) tss(CKO) tss(PULSE) PULSE MCLK CKOB CKO TR tw(PULSE) Figure 1 Trigger Mode 1 Trigger Mode 2 (Positive edge operation: MODE = "L") tsp(CKO) ∆t ∆t ∆t Vcc 0V Vcc 0V VOH VOL VOH VOL VOH VOL tw(TR) 1/fIN tsp(CKO) PULSE MCLK CKOB CKO TR tss(CKO) tss(PULSE) tss(CKO) tw(PULSE) Figure 2 Trigger Mode 2 Notes: 1. tss (CKO, CKOB and PULSE) equals the sum of input clock "L" width and α. Value α refers to internal delay in M66239FP. Under environment where temperature and VCC do not change, value α and tss are kept constant approximately. Dispersion of tss under such conditions is defined as ∆t (synchronizing precision: jitter). 2. Outputs (CKO, CKOB and PULSE) are unknown until twice trigger pulse input TR reaches after power-on. 3. Internal trigger signal is generated by EXOR of TR and MODE signal. |
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