M66239FP

Rev.1.00 Mar 16, 2005 page 8 of 23

Sync. Clock Phase Timing

M66239FP is able to control the phase of sync clock outputs (CKO, CKOB, PULSE) as each T/8 step. (T: clock period)

This phase shift control is set up by serial input resister No. 13.

Also, 1st edge phase (= (1) position) of sync clock outputs is not shifted, and 2nd edge phase (= (2) position) of sync

clock outputs is either not shifted position or resister set position, after 3rd edge phase (= (3) position) of sync clock

outputs is shift as resister settings.

CLKO output can not use this phase shift function because CLKO is asynchronous clock output to trigger.

PULSE

CLKO

TR

(1)

(2)

(3)

each T/8 step

MCLK

CKOB

CKO

TR

T

Phase shift = 0 set

Phase shift = (T/8)

×1 set

Phase shift = (T/8)

×2 set

Phase shift = (T/8)

×3 set

Phase shift = (T/8)

×4 set

Phase shift = (T/8)

×5 set

Phase shift = (T/8)

×6 set

Phase shift = (T/8)

×7 set

CKO

Notes: 1.

2.

1st edge phase of sync clock output is not shifted.

2nd edge phase of sync clock output is either not shifted position or resistor set position,

3rd edge phase of sync clock output is shift as resistor settings.

It can set T/8 step resolution, but if T/8 is less than synchronizing precision (jitter)

+/– 1.5 ns, it may be not able to realize such high step resolution.

T/8 is not guarantee value which is taken into account the jitter and noise.

Figure 3 Sync. Clock Phase Timing