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TDA8752H/6 Datasheet(PDF) 23 Page - NXP Semiconductors |
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TDA8752H/6 Datasheet(HTML) 23 Page - NXP Semiconductors |
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23 / 36 page ![]() 1999 Mar 09 23 Philips Semiconductors Product specification Triple high speed Analog-to-Digital Converter (ADC) TDA8752 CHARACTERISTICS VCCA = V11 (or V19, V27 or V99) referenced to AGND (V13, V21, V29 or V96 = 4.75 to 5.25 V; VCCD = V95 referenced to DGND (V86) = 4.75 to 5.25 V; VDDD = V40 referenced to VSSD (V41) = 4.75 to 5.25 V; VCCO = V59 (or V69, V79 or V85) referenced to OGND (V48, V60, V70 or V82) = 4.75 to 5.25 V; AGND, DGND, OGND and VSSD short circuited together. Tamb = 0 to 70 °C; typical values measured at VCCA =VDDD =VCCD =VCCO = 5 V and Tamb =25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VCCA analog supply voltage 4.75 5.0 5.25 V VCCD digital supply voltage 4.75 5.0 5.25 V VDDD logic supply voltage 4.75 5.0 5.25 V VCCO output stages supply voltage 4.75 5.0 5.25 V ICCA analog supply current − 120 − mA IDDD logic supply current for I2C-bus and 3-wire − 1.0 − mA ICCD digital supply current − 40 − mA ICCO output stages supply current ramp input; fCLK = 100 MHz − 6 − mA ICCO(PLL) output PLL supply current − 5 − mA ICCA(PLL) analog PLL supply current − 28 − mA ∆VCC supply voltage differences VCCA − VCCD −0.25 − +0.25 V VCCO − VCCD, VCCO − VDDD −0.25 − +0.25 V VCCA − VDDD, VCCD − VDDD −0.25 − +0.25 V VCCA − VCCO −0.25 − +0.25 V Ptot total power consumption ramp input; fCLK = 100 MHz − 1.0 − W Ppd power consumption in power-down mode − 87 − mW R, G and B amplifiers B bandwidth −3 dB; T amb =25 °C 250 −− MHz tset settling time of the block ADC plus AGC full-scale (black-to-white) transition; input signal settling time<1ns; 1 to 99%; Tamb =25 °C − 4.5 6 ns GNCOARSE coarse gain range Vref = 2.5 V; minimum coarse gain register; code = 32; (see Fig.8) −−1.67 − dB maximum coarse gain register; code = 99; (see Fig.8) − 8 − dB |
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