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R8C2C Datasheet(PDF) 54 Page - Renesas Technology Corp |
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R8C2C Datasheet(HTML) 54 Page - Renesas Technology Corp |
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54 / 58 page  R8C/2C Group, R8C/2D Group 5. Resets Rev.2.00 Dec 05, 2007 Page 33 of 585 REJ09B0339-0200 Table 5.2 shows the Pin Functions while RESET Pin Level is “L”, Figure 5.2 shows the CPU Register Status after Reset, Figure 5.3 shows the Reset Sequence, and Figure 5.4 shows the OFS Register. Figure 5.2 CPU Register Status after Reset Table 5.2 Pin Functions while RESET Pin Level is “L” Pin Name Pin Functions P0 to P3, P5 to P8 Input port P4_3 to P4_7 Input port P9_0 to P9_3 Input port b19 b0 Interrupt table register(INTB) Program counter(PC) User stack pointer(USP) Interrupt stack pointer(ISP) Static base register(SB) Content of addresses 0FFFEh to 0FFFCh Flag register(FLG) C IPL D Z S B O I U b15 b0 b15 b0 b15 b0 b8 b7 b15 b0 0000h 0000h 0000h 0000h 0000h 0000h 0000h Data register(R0) Data register(R1) Data register(R2) Data register(R3) Address register(A0) Address register(A1) Frame base register(FB) 00000h 0000h 0000h 0000h 0000h |
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