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PIC16CR74E/P Datasheet(PDF) 88 Page - Microchip Technology |
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PIC16CR74E/P Datasheet(HTML) 88 Page - Microchip Technology |
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88 / 172 page ![]() PIC16CR7X DS21993C-page 86 © 2007 Microchip Technology Inc. 11.1 A/D Acquisition Requirements For the A/D converter to meet its specified accuracy, the charge holding capacitor (CHOLD) must be allowed to fully charge to the input channel voltage level. The analog input model is shown in Figure 11-2. The source impedance (RS) and the internal sampling switch (RSS) impedance directly affect the time required to charge the capacitor CHOLD. The sampling switch (RSS) impedance varies over the device voltage (VDD), see Figure 11-2. The source impedance affects the offset voltage at the analog input (due to pin leakage current). The maximum recommended impedance for analog sources is 10 k Ω. After the analog input channel is selected (changed), the acquisition period must pass before the conversion can be started. To calculate the minimum acquisition time, TACQ, see the “PIC® Mid-Range MCU Family Reference Manual” (DS33023). In general, however, given a maximum source impedance of 10 k Ω and at a temperature of 100°C, TACQ will be no more than 16 μsec. FIGURE 11-2: ANALOG INPUT MODEL TABLE 11-1: TAD vs. MAXIMUM DEVICE OPERATING FREQUENCIES (STANDARD DEVICES (C)) AD Clock Source (TAD) Maximum Device Frequency Operation ADCS1:ADCS0 Max. 2TOSC 00 1.25 MHz 8TOSC 01 5 MHz 32TOSC 10 20 MHz RC(1, 2, 3) 11 (Note 1) Note 1: The RC source has a typical TAD time of 4 μs but can vary between 2-6 μs. 2: When the device frequencies are greater than 1 MHz, the RC A/D conversion clock source is only recommended for Sleep operation. 3: For extended voltage devices (LC), please refer to the Electrical Specifications section. CPIN VA RS ANx 5 pF VDD VT = 0.6V VT = 0.6V I leakage RIC ≤ 1k Sampling Switch SS RSS CHOLD = DAC Capacitance VSS 6V Sampling Switch 5V 4V 3V 2V 567 8 9 10 11 (k Ω) VDD = 51.2 pF ± 500 nA Legend: CPIN VT I leakage RIC SS CHOLD = input capacitance = threshold voltage = leakage current at the pin due to = interconnect resistance = sampling switch = sample/hold capacitance (from DAC) various junctions |
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