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PIC16CR74E/P Datasheet(PDF) 98 Page - Microchip Technology |
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PIC16CR74E/P Datasheet(HTML) 98 Page - Microchip Technology |
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98 / 172 page  PIC16CR7X DS21993C-page 96 © 2007 Microchip Technology Inc. TABLE 12-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS Register Devices Power-on Reset, Brown-out Reset MCLR Reset, WDT Reset Wake-up via WDT or Interrupt W 73747677 xxxx xxxx uuuu uuuu uuuu uuuu INDF 73 74 76 77 N/A N/A N/A TMR0 73 74 76 77 xxxx xxxx uuuu uuuu uuuu uuuu PCL 73747677 0000h 0000h PC + 1(2) STATUS 73 74 76 77 0001 1xxx 000q quuu(3) uuuq quuu(3) FSR 73747677 xxxx xxxx uuuu uuuu uuuu uuuu PORTA 73747677 --0x 0000 --0u 0000 --uu uuuu PORTB 73747677 xxxx xxxx uuuu uuuu uuuu uuuu PORTC 73747677 xxxx xxxx uuuu uuuu uuuu uuuu PORTD 73 74 76 77 xxxx xxxx uuuu uuuu uuuu uuuu PORTE 73 74 76 77 ---- -xxx ---- -uuu ---- -uuu PCLATH 73 74 76 77 ---0 0000 ---0 0000 ---u uuuu INTCON 73 74 76 77 0000 000x 0000 000u uuuu uuuu(1) PIR1 73 74 76 77 r000 0000 r000 0000 ruuu uuuu(1) 73 74 76 77 0000 0000 0000 0000 uuuu uuuu(1) PIR2 73 74 76 77 ---- ---0 ---- ---0 ---- ---u(1) TMR1L 73747677 xxxx xxxx uuuu uuuu uuuu uuuu TMR1H 73747677 xxxx xxxx uuuu uuuu uuuu uuuu T1CON 73747677 --00 0000 --uu uuuu --uu uuuu TMR2 73 74 76 77 0000 0000 0000 0000 uuuu uuuu T2CON 73747677 -000 0000 -000 0000 -uuu uuuu SSPBUF 73 74 76 77 xxxx xxxx uuuu uuuu uuuu uuuu SSPCON 73 74 76 77 0000 0000 0000 0000 uuuu uuuu CCPR1L 73747677 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1H 73747677 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON 73 74 76 77 --00 0000 --00 0000 --uu uuuu RCSTA 73 74 76 77 0000 -00x 0000 -00x uuuu -uuu TXREG 73747677 0000 0000 0000 0000 uuuu uuuu RCREG 73 74 76 77 0000 0000 0000 0000 uuuu uuuu CCPR2L 73747677 xxxx xxxx uuuu uuuu uuuu uuuu CCPR2H 73747677 xxxx xxxx uuuu uuuu uuuu uuuu CCP2CON 73 74 76 77 0000 0000 0000 0000 uuuu uuuu ADRES 73747677 xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 73 74 76 77 0000 00-0 0000 00-0 uuuu uu-u OPTION_REG 73 74 76 77 1111 1111 1111 1111 uuuu uuuu TRISA 73747677 --11 1111 --11 1111 --uu uuuu TRISB 73747677 1111 1111 1111 1111 uuuu uuuu TRISC 73747677 1111 1111 1111 1111 uuuu uuuu TRISD 73 74 76 77 1111 1111 1111 1111 uuuu uuuu TRISE 73 74 76 77 0000 -111 0000 -111 uuuu -uuu Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition, r = reserved, maintain clear Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 12-5 for Reset value for specific condition. |
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