14

DS608F1

CS5342

4. APPLICATIONS

4.1

Single-, Double-, and Quad-Speed Modes

The CS5342 can support output sample rates from 2 kHz to 200 kHz. The proper speed mode can be de-

termined by the desired output sample rate and the external MCLK/LRCK ratio, as shown in Table 1.

Table 1. Speed Modes and the Associated Output Sample Rates (Fs)

4.2

Operation as Either a Clock Master or Slave

The CS5342 supports operation as either a clock master or slave. As a clock master, the LRCK and SCLK

pins are outputs with the left/right and serial clocks synchronously generated on-chip. As a clock slave, the

LRCK and SCLK pins are inputs and require the left/right and serial clocks to be externally generated. The

selection of clock master or slave is made via the Mode pins as shown in Table 2.

Speed Mode

MCLK/LRCK

Ratio

Output Sample Rate Range (kHz)

Single-Speed Mode

768x

43 - 50

384x

2 - 50

Double-Speed Mode

384x

86 - 100

192x

50 - 100

Quad-Speed Mode

192x

172 - 200

96x*

100 - 200

* Quad-Speed Mode, 96x only available in Master Mode.

M1 (Pin 16)

M0 (Pin 1)

MODE

0

0

Clock Master, Single-Speed Mode

0

1

Clock Master, Double-Speed Mode

1

0

Clock Master, Quad-Speed Mode

1

1

Clock Slave, All Speed Modes

Table 2. CS5342 Mode Control