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405EZ Datasheet(PDF) 13 Page - Applied Micro Circuits Corporation |
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405EZ Datasheet(HTML) 13 Page - Applied Micro Circuits Corporation |
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13 / 54 page ![]() PPC405EZ – PowerPC 405EZ Embedded Processor Revision 1.27 - August 22, 2007 AMCC Proprietary 13 Preliminary Data Sheet Chameleon Timer The Chameleon Timer’s Timer Service Engine (TSE) controls the local Timer RAM configured as 120 32-bit words and up to fifteen 24-bit timer channels, each with an Input Capture Register or an Output Compare Register. The Chameleon Timer interfaces to the OPB. Features include: • Pulse Width Modulation (PWM) and space vector PWM functions with non-overlap times – Programmable “deadband” intervals – Pulse period measurement – 48-bit input capture function – 48-bit output compare function – IEEE1588 time stamps – Automatic up, down, and up-then-down counting with modulus • Autonomous Timer Service Engine (TSE) manages timer channels – CPU programs “registers” in Timer SRAM (120x32 bits) • 15 timer channels + 1 timebase channel • Pulse period measurements • Configurable for seven 48-bit channels or 15 24-bit channels • Up to two timebases available simultaneously – Each time base has four optional sources: three internal (Timebase A, Timebase B, and IEEE1588) and one external • Speed/resolution: 166MHz counter, 2-clock (20ns) minimum period • Latency: 0.49 μsec worst case (based on 133MHz system clock) • External “Fault” pin to automatically disable timer channel outputs • Low EMC switching noise • Unused Timer I/O pins available for GPIO use • 32-bit OPB slave interface General Purpose I/O (GPIO) Controller The GPIO controller enables multiplexing of module I/O pins with multiple functions within the chip. That is, a single package pin can be assigned to multiple I/O functions. Which function the pin is assigned to is determined by register bit settings controlled by software. This significantly reduces the number of package pins needed to support multiple I/O groups. Features include: • Up to 54 GPIOs available – GPIOs are multiplexed with alternate functions – If not in use for dedicated functions, I/Os are available as GPIOs • Direct control of all functions from registers programmed by means of OPB bus master accesses • Time multiplexing of controller outputs to module outputs • Programmable conversion of module outputs to open-drain outputs (enables sharing of active low outputs externally) • Time multiplexing of module inputs to controller inputs |
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