HT48C062 datasheet(7/31 Pages) HOLTEK

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HT48R062/HT48C062

Rev. 1.11

October 30, 2006

The Z, OV, AC and C flags generally reflect the status of

the latest operations.

In addition, on executing the subroutine call, the status

If the contents of the status are important and if the sub-

routine can corrupt the status register, precautions must

be taken to save it properly.

Oscillator Configuration

There are two oscillator circuits implemented in the

microcontroller.

Both are designed for system clocks; the RC oscillator

and the Crystal oscillator, which are determined by code

options. No matter what oscillator type is selected, the

signal provides the system clock. The HALT mode stops

the system oscillator and ignores the external signal to

conserve power.

If an RC oscillator is used, an external resistor between

OSC1 and VSS in needed and the resistance must

range from 24k

W to 1MW. The system clock, divided by

4, is available on OSC2, which can be used to synchro-

nize external logic. The RC oscillator provides the most

cost effective solution. However, the frequency of the

oscillation may vary with VDD, temperature and the chip

itself due to process variations. It is, therefore, not suit-

able for timing sensitive operations where accurate os-

cillator frequency is desired.

If the Crystal oscillator is used, a crystal across OSC1

and OSC2 is needed to provide the feedback and phase

shift for the oscillator. No other external components are

needed. Instead of a crystal, the resonator can also be

connected between OSC1 and OSC2 to get a frequency

reference, but two external capacitors in OSC1 and

OSC2 are required.

Watchdog Timer

- WDT

The clock source of WDT is implemented by a dedicated

RC oscillator (WDT oscillator) or instruction clock (sys-

tem clock divided by 4), decided by options. This timer is

designed to prevent a software malfunction or sequence

from jumping to an unknown location with unpredictable

results. The Watchdog Timer can be disabled by an op-

tion. If the Watchdog Timer is disabled, all the execu-

tions related to the WDT result in no operation.

Once the internal WDT oscillator (RC oscillator with a

period of 32

ms at 5V normally) is selected, it is first di-

vided by 512 (9-stage) to get the nominal time-out pe-

riod of approximately 17ms at 5V. This time-out period

may vary with temperatures, VDD and process varia-

tions. By invoking the WDT prescaler, longer time-out

periods can be realized. Writing data to WS2, WS1,

WS0 (bit 2,1,0 of the WDTS) can give different time-out

periods. If WS2, WS1, and WS0 are all equal to 1, the di-

vision ratio is up to 1:128, and the maximum time-out

period is 2.1s at 5V seconds. If the WDT oscillator is dis-

abled, the WDT clock may still come from the instruction

clock and operate in the same manner except that in the

HALT state the WDT may stop counting and lose its pro-

tecting purpose. In this situation the logic can only be re-

started by external logic. The high nibble and bit 3 of the

WDTS are reserved for user

¢s defined flags, which can

be used to indicate some specified status.

If the device operates in a noisy environment, using the

on-chip RC oscillator (WDT OSC) is strongly recom-

mended, since the HALT will stop the system clock.

WS2

WS1

WS0

Division Ratio

000

1:1

001

1:2

010

1:4

011

1:8

1:16

1:32

1:64

1:128

WDTS (09H) Register

The WDT overflow under normal operation will initialize

²chip reset² and set the status bit ²TO². But in the HALT

mode, the overflow will initialize a

²warm reset², and

only the Program Counter and SP are reset to zero. To

clear the contents of WDT (including the WDT

prescaler), three methods are adopted; external reset (a

low level to RES), software instruction and a

²HALT² in-

C r y s t a l O s c i l l a t o r

R C O s c i l l a t o r

O S C 1

O S C 2

N M O S o p e n d r a i n

f S Y S / 4

V D D

O S C 1

O S C 2

4 7 0 p F

R 1

C 1

C 2

R O S C

System Oscillator

S y s t e m C l o c k / 4

8 - b i t C o u n t e r

W D T P r e s c a l e r

7 - b i t C o u n t e r

8 - t o - 1 M U X

W D T T i m e - o u t

W S 0 ~ W S 2

O p t i o n

S e l e c t

W D T O S C

( 2 4 k H z )

¸ 2

Watchdog Timer

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