TMP93CS44 datasheet(171/224 Pages) TOSHIBA

171 / 224 page

TMP93CS44/S45

2004-02-10

93CS44-169

(2) Transfer mode

SBICR1<SIOM1:0> are used to select a transmit, receive, or transmit/receive mode.

1. 8-bit transmit mode

Set a control register to a transmit mode and write data to the SBIDBR.

After the data is written, set SBICR1<SIOS> to 1 to start data transfer. The

transmitted data is transferred from the SBIDBR to the shift register and output

to the SO pin in synchronous with the serial clock, starting from the least

significant bit (LSB). When the data is transferred to the shift register, the

SBIDBR becomes empty. The INTS2 (Buffer empty) interrupt request is

generated to request new data.

When the internal clock is used, the serial clock will stop and automatic-wait

function will be initiated if new data is not loaded to the data buffer register after

the specified 8-bit data is transmitted. When new data is written, automatic-wait

function is canceled.

When the external clock is used, data should be written to the SBIDBR before

new data is shifted. The transfer speed is determined by the maximum delay time

between the time when an interrupt request is generated and the time when data

is written to the SBIDBR by the interrupt service program.

When the transmit is started, after SBISR<SIOF> goes 1 the same value as the

final bit of the last data is output until the falling edge of the SCK.

Transmitting data is ended by clearing <SIOS> to 0 with the buffer empty

interrupt service program or setting SBICR1<SIOINH> to 1. When <SIOS> is

cleared, the transmitted mode ends when all data is output. In order to confirm if

data is surely transmitted by the program, set <SIOF> to be sensed. <SIOF> is

cleared to 0 when transmitting is complete. When <SIOINH> is set to 1,

transmitting data stops. <SIOF> turns 0.

When the external clock is used, it is also necessary to clear <SIOS> to 0 before

new data is shifted; otherwise, dummy data is transmitted and operation ends.

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