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TMP93CS44 Datasheet(PDF) 174 Page - Toshiba Semiconductor

Part # TMP93CS44
Description  CMOS 16-Bit Microcontroller
PDF  224 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP93CS44 Datasheet(HTML) 174 Page - Toshiba Semiconductor

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TMP93CS44/S45
2004-02-10
93CS44-172
Figure 3.10.25 Receive Mode (Example: Internal clock)
3. 8-bit transmit/receive mode
Set a control register to a transmit/receive mode and write data to the SBIDBR.
After the data is written, set SBICR1<SIOS> to 1 to start transmitting/receiving.
When transmitting, the data is output from the SO pin on the leading edges in
synchronous with the serial clock, starting from the least significant bit (LSB).
When receiving, the data is input to the SI pin on the trailing edges of the serial
clock. The 8-bit data is transferred from the shift register to the SBIDBR, and the
INTS2 interrupt request occurs. The interrupt service program reads the received
data from the data buffer register and writes data to be transmitted. The SBIDBR
is used for both transmitting and receiving. Transmitted data should always be
written after received data is read.
When the internal clock is used, automatic-wait function is initiated until
received data is read and next data is written.
When the external clock is used, since the shift operation is synchronized with
the external clock, received data is read and transmitted data is written before
new shift operation is executed. The maximum transfer speed when the external
clock is used is determined by the delay time between the time when an interrupt
request is generated and the time when received data is read and transmitted
data is written.
When the transmit is started, after SBISR<SIOF>
= 1 output from the SO pin
holds final bit of last data until falling edge of the SCK.
Transmitting/receiving data is ended by clearing <SIOS> to 0 by the INTS2
interrupt service program or setting SBICR1<SIOINH> to 1. When <SIOS> is
cleared, received data is transferred to the SBIDBR in complete blocks. The
transmit/receive mode ends when the transfer is complete. In order to confirm if
data is surely transmitted/received by the program, set SBISR<SIOF> to be
sensed. <SIOF> becomes 0 after transmitting/receiving is complete. When
<SIOINH> is set, transmitting/receiving data stops. <SIOF> turns 0.
Note:
When the transfer mode is switched, the SBIDBR contents are lost. In case
that the mode needs to be switched, transmitting/receiving data is concluded
by clearing <SIOS> to 0, read the last data, and then switch the transfer mode.
b
b7
<SIOS>
a2
a1
a4
a3
a6
a5
b0
a7
b2
b1
b4
b3
b6
b5
a0
Clear <SIOS>
<SIOF>
<SEF>
SCK pin (Output)
a
Read received data
SI pin
INTS2 interrupt request
SBIDBR
Read received data



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