| Electronic Components Datasheet Search |
|
TMP93CS44 Datasheet(PDF) 183 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMP93CS44 Datasheet(HTML) 183 Page - Toshiba Semiconductor |
|
183 / 224 page ![]() TMP93CS44/S45 2004-02-10 93CS44-181 Table 3.11.2 shows the relations between AD conversion modes and interrupt request. Table 3.11.2 Relation between AD Conversion Modes and Interrupt Request ADMOD0 Mode Interrupt Request Timing <ITM0> <REPET> <SCAN> Fixed channel single conversion mode After conversion X 0 0 Channel scan single conversion mode After conversion X 0 1 After every conversion 0 Fixed channel repeat conversion mode After every fourth conversion 1 1 0 Channel scan repeat conversion mode After every scan conversion X 1 1 X: Don’t Care (5) AD conversion time 140 states (14 µs at fc = 20 MHz) are required for AD conversion of one channel. (6) Storing and reading the AD conversion result AD conversion results are stored in AD conversion result registers high/low (ADREG04H/L to ADREG37H/L). These registers are read only. In fixed channel repeat conversion mode, AD conversion results are stored in order from ADREG04H/L to ADREG37H/L. Except in this mode, AD conversion results for channel AN0 and AN4, AN1 and AN5, AN2 and AN6, AN3 and AN7 are stored severally ADREG04H/L, ADREG15H/L, ADREG26H/L, ADREG37H/L. Table 3.11.3 shows correspondence between analog input channels and AD conversion result registers. Table 3.11.3 Correspondence between Analog Input Channels and AD Conversion Result Registers AD Conversion Result Registers Analog Input Channel (port 5) Conversion Modes except Right Fixed Channel Repeat Conversion Mode (Every fourth conversion) AN0 ADREG04H/L AN1 ADREG15H/L AN2 ADREG26H/L AN3 ADREG37H/L AN4 ADREG04H/L AN5 ADREG15H/L AN6 ADREG26H/L AN7 ADREG37H/L ADREG04H/L ADREG15H/L ADREG26H/L ADREG37H/L AD conversion result registers bit0 is AD conversion result stored flag <ADRxRF>. The flag shows that whether those registers are read or not. When AD conversion results are stored in those registers (ADREGxH or ADREGxL), this flag is set to 1. When each register is read, this flag is cleared to 0, and AD conversion end flag ADMOD0<EOCF> is also cleared to 0. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |