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TMP86CS64AFG Datasheet(PDF) 38 Page - Toshiba Semiconductor

Part # TMP86CS64AFG
Description  8 Bit Microcontroller
PDF  202 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP86CS64AFG Datasheet(HTML) 38 Page - Toshiba Semiconductor

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Page 28
2. Operational Descriptions
2.2 System Clock Controller
TMP86CS64AFG
• Entering IDLE1/2 or SLEEP1/2 mode
After clearing the interrupt master enable flag (IMF) to 0, set the individual interrupt enable
flag used to exit the IDLE1/2 or SLEEP1/2 mode to 1.
To enter the EDLE1/2 or SLEEP1/2 mode, set SYSCR2<IDELE> to 1.
• Exiting IDLE1/2 or SLEEP1/2 Mode
Upon return from the IDEL1/2 or SLEEP1/2 mode, the interrupt master enable flag (IMF)
determines the action taken after exiting the IDLE1/2 or SLEEP1/2 mode; i.e., whether execu-
tion resumes with an interrupt service routine. When exiting the IDLE1//2 or SLEEP1/2 mode,
SYSCR2<IDLE> is automatically cleared to 0, and the operating mode is returned to the mode
before entering the IDLE1/2 or SLEEP1/2 mode.
The IDLE1/2 or SLEEP1/2 mode is exited by setting the RESET pin to low. In this case,
the NORMAL1 mode is activated after exitig the IDLE1/2 or SLEEP1/2.
(1) Program execution resuming with the instruction (IMF = 0)
The IDLE1/2 or SLEEP1/2 mode is exited by the individual interrupt enable flag (EF). Program
execution resumes with the instruction immediately following the instruction that activated the
IDLE1/2 or SLEEP1/2 mode. Normally the instruction latches (IL) of the interrupt source used to
exit the IDLE1/2 or SLEEP1/2 mode must be cleared to 0 by the load instruction.
(2) Program execution resuming with the interrupt service routine (IMF = 1)
The IDEL1/2 or SLEEP1/2 mode is exited by an interrupt source enabled by the individual inter-
rupt enable flag (EF). Execution resumes with the interrupt service routine. Upon completion of the
interrupt service routine, program execution resumes with the instruction immediately following the
instruction that activated the IDEL1/2 or SLEEP1/2 mode.
Note: When a watchdog timer interrupt is generated immediately before entering the IDEL1/2 or
SLEEP1/2 mode, the watchdog timer interrupt is processed without entering the IDEL1/2 or
SLEEP1/2 mode.



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