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TMP86CS64AFG Datasheet(PDF) 189 Page - Toshiba Semiconductor |
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TMP86CS64AFG Datasheet(HTML) 189 Page - Toshiba Semiconductor |
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189 / 202 page ![]() Page 179 TMP86CS64AFG 18. Key-on Wakeup (KWU) In the TMP86CS64AFG, the STOP mode is released by not only P20(INT5/STOP) pin but also four (STOP2 to STOP5) pins. When the STOP mode is released by STOP2 to STOP5 pins, the STOP pin needs to be used. In details, refer to the following section " 18.2 Control ". 18.1 Configuration Figure 18-1 Key-on Wakeup Circuit 18.2 Control STOP2 to STOP5 pins can controlled by Key-on Wakeup Control Register (STOPCR). It can be configured as enable/disable in 1-bit unit. When those pins are used for STOP mode release, configure corresponding I/O pins to input mode by I/O port register beforehand. 18.3 Function Stop mode can be entered by setting up the System Control Register (SYSCR1), and can be exited by detecting the "L" level on STOP2 to STOP5 pins, which are enabled by STOPCR, for releasing STOP mode (Note1). Key-on Wakeup Control Register STOPCR 76 54 3 2 1 0 (0031H) STOP5 STOP4 STOP3 STOP2 (Initial value: 0000 ****) STOP5 STOP mode released by STOP5 0:Disable 1:Enable Write only STOP4 STOP mode released by STOP4 0:Disable 1:Enable Write only STOP3 STOP mode released by STOP3 0:Disable 1:Enable Write only STOP2 STOP mode released by STOP2 0:Disable 1:Enable Write only STOPCR INT5 STOP STOP mode release signal (1: Release) (0031H) STOP2 STOP3 STOP4 STOP5 |
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