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TMP86FS23UG Datasheet(PDF) 76 Page - Toshiba Semiconductor |
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TMP86FS23UG Datasheet(HTML) 76 Page - Toshiba Semiconductor |
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76 / 252 page  Page 64 5. I/O Ports 5.7 Port P8 (P87 to P80) TMP86FS23UG 5.7 Port P8 (P87 to P80) Port P8 is an 8-bit input/output port which can be configured as an input or an output in one-bit unit. Port P8 is also used as a segment output of LCD. Input/output mode is specified by the P8 control register (P8CR). When used as an input port, the corresponding bit of P8CR and P8LCR should be cleared to “0”. When used as an output port, the corresponding bit of P8CR should be set to “1”, and the respective P8LCR bit should be cleared to “0”. When used as a segment pins of LCD, the respective bit of P8LCR should be set to “1”. During reset, the output latch (P8DR), P8CR and P8LCR are initialized to “0”. When the bit of P8CR and P8LCR is “0”, the corresponding bit data by read instruction is a terminal input data. When the bit of P8CR is “0” and that of P8LCR is “1”, the corresponding bit data by read instruction is always “0”. When the bit of P8CR is “1”, the corresponding bit data by read instruction is the value of P8DR. Note: Asterisk (*) indicates “1” or “0” either of which can be selected. Figure 5-8 Port P8 Table 5-11 Register Programming for Multi-function ports Function Port Input P8DR P8CR P8LCR Port input * “0” “0” Port “0” output “0” “1” “0” Port “1” output “1” “1” “0” LCD segment output * * “1” Table 5-12 Values Read from P8DR and Register Programming Conditions Values Read from P8DR P8CR P8LCR “0” “0” Terminal input data “0” “1” “0” “1” “0” Output latch contents “1” P8LCRi Output latch Data output (P8DRi) LCD data output STOP OUTEN P8LCRi input P8CRi P8CRi input Data input (P8DRi) P8i Note:i=7 to 0 D Q D Q D Q |
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