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TDP142 Datasheet(PDF) 21 Page - Texas Instruments |
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TDP142 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 37 page ![]() Table 7-7. DisplayPort_2 Register Field Descriptions (continued) Bit Field Type Reset Description 5-4 RESERVED R/W 0x0 Reserved 3 DP3_DISABLE R/W 0x0 When AUX_SNOOP_DISABLE = 1b, this field can be used to enable or disable DP lane 3. When AUX_SNOOP_DISABLE = 0b, changes to this field have no effect on lane 3 functionality. 0x0 = DP Lane 3 enabled. 0x1 = DP Lane 3 disabled. 2 DP2_DISABLE R/W 0x0 When AUX_SNOOP_DISABLE = 1b, this field can be used to enable or disable DP lane 2. When AUX_SNOOP_DISABLE = 0b, changes to this field have no effect on lane 2 functionality. 0x0 = DP Lane 2 enabled. 0x1 = DP Lane 2 disabled. 1 DP1_DISABLE R/W 0x0 When AUX_SNOOP_DISABLE = 1b, this field can be used to enable or disable DP lane 1. When AUX_SNOOP_DISABLE = 0b, changes to this field have no effect on lane 1 functionality. 0x0 = DP Lane 1 enabled. 0x1 = DP Lane 1 disabled. 0 DP0_DISABLE R/W 0x0 When AUX_SNOOP_DISABLE = 1b, this field can be used to enable or disable DP lane 0. When AUX_SNOOP_DISABLE = 0b, changes to this field have no effect on lane 0 functionality. 0x0 = DP Lane 0 enabled. 0x1 = DP Lane 0 disabled. 7.1.6 VOD_CTRL Register (Offset = 0x32) [reset = 0x40] VOD_CTRL is shown in Table 7-8. Return to the Summary Table. This register controls the transmitters output linearity range. Table 7-8. VOD_CTRL Register Field Descriptions Bit Field Type Reset Description 7-6 Reserved R/W 0x1 Reserved 5-4 DP_VOD R/W 0x0 VOD linearity control for DP paths. 0x0 = LINR_L3 (highest) 0x1 = LINR_L2 0x2 = LINR_L1 0x3 = LINR_L0 (lowest) 3-0 Reserved R/W 0x0 Reserved www.ti.com TDP142-Q1 SLLSG10A – NOVEMBER 2024 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TDP142-Q1 |
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