STM32U385CG datasheet(122/224 Pages) STMICROELECTRONICS

122 / 224 page

Bus

Peripheral

LDO

SMPS

Unit

Range 1

Range 2

Stop 1/2

Range 1

Range 2

Stop 1/2

SPI1 Indep

μA/MHz

0.68

0.59

0.22

0.17

TIM1

3.89

3.35

1.27

0.97

TIM15

2.28

1.96

0.75

0.58

TIM16

1.41

1.2

0.46

0.36

TIM17

1.71

1.46

0.56

0.43

USART1

3.95

3.38

1.29

0.99

0.65

USART1 Indep

2.63

2.27

0.86

0.66

USB1

2.41

2.06

0.78

0.6

USB1 Indep

0.77

0.66

0.25

0.19

COMP

0.26

0.22

0.26

0.08

0.06

0.08

I2C3

0.64

0.55

2.13

0.21

0.16

0.7

I2C3 Indep

1.49

1.29

1.49

0.49

0.37

0.49

LPTIM1

1.13

0.97

1.13

0.37

0.28

0.37

LPTIM1 Indep

2.96

2.57

2.95

0.98

0.74

0.97

LPTIM3

0.88

0.75

0.88

0.29

0.22

0.28

LPTIM3 Indep

2.59

2.22

2.57

0.85

0.64

0.85

LPTIM4

0.71

0.61

0.71

0.23

0.18

0.23

LPTIM4 Indep

1.68

1.43

1.67

0.55

0.42

0.55

LPUART1

1.16

1.01

1.15

0.38

0.29

0.38

LPUART1 Indep

1.72

0.66

0.5

0.66

SYSCFG

0.28

0.25

0.09

0.07

ALL_ON

104.17

99.41

58.74

37.58

28.85

19.25

5.3.7

Wake-up time from low-power modes and voltage scaling transition times

The wake-up times given in the table below are the latency between the event and the execution of the first user

instruction (FSTEN = 1 in PWR_CR3 if not mentioned).

The device goes in low-power mode after the WFE (wait for event) instruction.

Table 67. Low-power mode wake-up timings on LDO

Symbol

Parameter

Conditions

Typ (3 V,

30°C)

Max (1)(3 V)

Unit

twu)(Sleep

Wake-up time from

Sleep mode to Run

mode

SLEEP_PD=0

CPU cycles

SLEEP_PD = 1 with MSI = 48 MHz

9.5

µs

twu(Stop 0)

Wake up time from

Stop 0 mode to Run

mode all SRAMs

retained

Wake-up in flash, range 2,

PWR_CR2.FLASHFWU = 1

PWR_CR2.SRAMFWU=1 ICACHE OFF

MSI

48 MHz

3.7

µs

Wake-up in flash, range 2,

PWR_CR2.FLASHFWU = 0

PWR_CR2.SRAMFWU=0

MSI

48 MHz

9.8

HSI

16 MHz

9.7

MSI

3 MHz

14.7

STM32U385xx

Electrical characteristics

DS14830 - Rev 2

page 122/224

STM32U385CG Datasheet(PDF) 122 Page - STMicroelectronics

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