STM32U385CG datasheet(37/224 Pages) STMICROELECTRONICS

37 / 224 page

Note:

The number of capacitive sensing channels is dependent on the size of the packages and subject to I/O

availability.

3.27

Coupling and chaining bridge

The coupling and chaining bridge (CCB) is a sophisticated security mechanism designed to ensure that private

keys are protected, even against CPU access, and are wrapped with unique device keys, and stored securely in a

secure storage.

The CCB can be programmed to implement special coupling and chaining operations, which are required to

protect private keys used in PKA protected operations.

These coupling and chaining operations involve the PKA, the SAES, and sometimes the RNG peripherals.

The main features of CCB are:

•

AHB system slave port, mapping multiple peripherals

–

AHB configuration slave port (CCB peripheral), for which any read access is supported. For writes

they must be 32-bit word accesses only, otherwise an AHB error occurs.

•

Support for coupling PKA RAM writes to SAES input data register

•

Support for read and write chaining between PKA RAM and SAES

•

Support for SAES to CCB read chaining, with comparison to a 128-bit reference tag

•

Support for RNG output chaining with either PKA RAM or SAES_IVR registers

•

Dedicated sequences to support three PKA protected operations: modular exponentiation, scalar

multiplication, and ECDSA (elliptic curve digital signature algorithm) signature

–

One-time sequence to prepare a PKA protected operation (blob creation)

–

Many-time sequence to execute PKA protected operation (blob usage)

•

Optional private key generation for ECDSA signature, and for ECC private key cryptography (key never

accessible to the application in clear-text)

•

Possibility to encrypt, with AES-256, any PKA blob encryption key using the device unique secret key

DHUK (in the SAES). This makes the PKA encrypted blob usable only on this device.

•

Software-reset capability

•

Repository for cryptographic subsystem tamper event flags

3.28

Random number generator (RNG)

The RNG is a true random number generator that provides full entropy outputs to the application as 32-bit

samples. It is composed of a live entropy source (analog) and an internal conditioning component.

The RNG is a NIST SP 800-90B compliant entropy source that can be used to construct a nondeterministic

random bit generator (NDRBG).

The RNG true random number generator has been precertified NIST SP800-90B. It has also been tested using

the German BSI statistical tests of AIS-31 (T0 to T8).

The RNG main features are the following:

•

The RNG delivers 32-bit true random numbers, produced by an analog entropy source conditioned by a

NIST SP800-90B approved conditioning stage.

•

It can be used as the entropy source to construct a nondeterministic random bit generator (NDRBG).

•

In the NIST configuration, it produces four 32-bit random samples every 412 AHB clock cycles if fAHB <

fthreshold (256 RNG clock cycles otherwise).

•

It embeds startup and NIST SP800-90B approved continuous health tests (repetition count and adaptive

proportion tests), associated with specific error management

•

It can be disabled to reduce power consumption, or enabled with an automatic low-power mode (default

configuration).

•

It has an AMBA® AHB slave peripheral, accessible through 32-bit word single accesses only (else an AHB

bus error is generated, and the write accesses are ignored).

STM32U385xx

Functional overview

DS14830 - Rev 2

page 37/224

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