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STM32U385CG Datasheet(PDF) 148 Page - STMicroelectronics

Part # STM32U385CG
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 144 DMIPS, 1 MB flash memory, 256 KB SRAM, SMPS, crypto
PDF  224 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U385CG Datasheet(HTML) 148 Page - STMicroelectronics

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(2): The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in the
above table. Otherwise the reset is not taken into account by the device.
(3): The external capacitor on NRST must be placed as close as possible to the device.
5.3.16
Extended interrupt and event controller input (EXTI) characteristics
The pulse on the interrupt input must have a minimal length in order to guarantee that it is detected by the event
controller.
Table 93. EXTI input characteristics
Specified by design and not tested in production.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
PLEC
Pulse length to event controller
-
25
-
-
ns
5.3.17
Analog switches booster
Table 94. Analog switches booster characteristics
Specified by design and not tested in production.
Symbol
Parameter
Min
Typ
Max
Unit
VDD
Supply voltage
1.6
1.8
3.6
V
tSU(BOOST)
Booster startup time
-
-
50
µs
IDD(BOOST)
Booster consumption
-
-
125
µA
5.3.18
12-bit analog-to-digital converter ADC characteristics
Unless otherwise specified, the parameters given in Table 95 are values derived from tests performed under
ambient temperature, fHCLK frequency, and VDDA supply voltage conditions summarized in Table 27.
Note:
It is recommended to perform a calibration after each power-up.
Table 95. 12-bit ADC characteristics
The voltage booster on the ADC switches must be used when VDDA < 2.4 V (embedded I/O switches).
Specified by design. Not tested in production.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDDA
Analog power supply for ADC ON
-
1.62
-
3.6
V
VREF+
Positive reference voltage
-
1
-
VDDA
VREF-
Negative reference voltage
-
VSSA
fADC
ADC clock frequency
1.62 V ≤ VDDA ≤ 3.6 V
0.14
-
55
MHz
ADC clock duty cycle
-
45
-
55
%
fs
Sampling rate
Resolution = 12 bits
0.01
-
2.75
Msps
Resolution = 10 bits
0.012
-
3.05
Resolution = 8 bits
0.014
-
3.43
Resolution = 6 bits
0.0175
-
3.92
tTRIG
External trigger period
Resolution = 12 bits
16
-
-
1/fADC
VAIN(1)
Conversion voltage range
-
0
-
VREF+
V
RAIN(2)
External input impedance
Tj = 110°C
Resolution = 12 bits
-
-
2.2
kΩ
Resolution = 10 bits
-
-
6.8
Resolution = 8 bits
-
-
33.0
STM32U385xx
Electrical characteristics
DS14830 - Rev 2
page 148/224



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