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ADXL356CEZ Datasheet(PDF) 49 Page - Analog Devices |
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ADXL356CEZ Datasheet(HTML) 49 Page - Analog Devices |
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49 / 52 page ![]() Data Sheet ADXL356/ADXL357/ADXL357B REGISTER DEFINITIONS analog.com Rev. C | 49 of 52 Table 49. Bit Descriptions for Range (Continued) Bits Bit Name Settings Description Reset Access 10 ±20 g. 11 ±40 g. POWER CONTROL REGISTER Address: 0x2D, Reset: 0x01, Name: POWER_CTL Table 50. Bit Descriptions for POWER_CTL Bits Bit Name Settings Description Reset Access [7:3] Reserved Reserved. 0x0 R 2 DRDY_OFF Set to 1 to force the DRDY output to 0 in modes where it is normally signal data ready. 0x0 R/W 1 TEMP_OFF Set to 1 to disable temperature processing. Temperature processing is also disabled when standby = 1. 0x0 R/W 0 Standby Standby or measurement mode. 0x1 R/W 1 Standby mode. In standby mode, the device is in a low power state, and the temperature and acceleration datapaths are not operating. In addition, digital functions, including FIFO pointers, reset. Changes to the configuration setting of the device must be made when standby = 1. An exception is a high-pass filter that can be changed when the device is operating. 0 Measurement mode. SELF TEST REGISTER Address: 0x2E, Reset: 0x00, Name: SELF_TEST Refer to the Self Test section for more information on the operation of the self test feature. Table 51. Bit Descriptions for SELF_TEST Bits Bit Name Settings Description Reset Access [7:2] Reserved Reserved. 0x0 R 1 ST2 Set to 1 to enable self test force 0x0 R/W 0 ST1 Set to 1 to enable self test mode 0x0 R/W RESET REGISTER Address: 0x2F, Reset: 0x00, Name: Reset Table 52. Bit Descriptions for Reset Bits Bit Name Settings Description Reset Access [7:0] Reset Write Code 0x52 to reset the device, similar to a power-on reset (POR) 0x0 W For the ADXL357 (fixed on the ADXL357B), in case of a software reset, an unlikely race condition may occur. If the race condition occurs, some factory settings in the NVM load incorrectly to shadow registers (the registers from which the internal logic configures the sensor and calculates the output after a power-on or a software reset). The incorrect loading of the NVM affects overall performance of the sensor, such as an incorrect 0 g bias and other performance issues. The incorrect loading of NVM does not occur from a power-on or after a power cycle. To guarantee reliable operation of the sensor after a software reset, the user can access the shadow registers after a power-on, read and store the values on the host microprocessor, and compare the values read from the same shadow registers after a software reset. This method guarantees proper operation in all devices and under all conditions. The recommended steps are as follows: 1. Read the shadow registers, Register 0x50 to Register 0x54 (five 8-bit registers) after power-up, but before any software reset. 2. Store these values in a host device (for example, a host microprocessor). 3. After each software reset, read the same five registers. If the values differ, perform a software reset again until they match. |
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