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DAC813 Datasheet(PDF) 1 Page - Texas Instruments |
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DAC813 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 17 page ![]() 1 ® DAC813 25k Ω 25k Ω 24.9k Ω BPO 20V Span 20V Span V OUT V REF IN V REF OUT 10V Reference 12-Bit D/A Converter D/A Latch Input Latch Input Latch Reset 4 MSBs 8 LSBs 49.5k Ω 48 12 ® International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 DAC813 DAC813 DAC813 Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES q ±1/2LSB NONLINEARITY OVER TEMPERATURE q GUARANTEED MONOTONIC OVER TEMPERATURE q LOW POWER: 270mW typ q DIGITAL INTERFACE DOUBLE BUFFERED: 12 AND 8 + 4 BITS q SPECIFIED AT ±12V AND ±15V POWER SUPPLIES q RESET FUNCTION TO BIPOLAR ZERO q 0.3" WIDE DIP AND SO PACKAGES DESCRIPTION The DAC813 is a complete monolithic 12-bit digital- to-analog converter with a flexible digital interface. It includes a precision +10V reference, interface con- trol logic, double-buffered latch and a 12-bit D/A converter with voltage output operational amplifier. Fast current switches and laser-trimmed thin-film resistors provide a highly accurate, fast D/A con- verter. Digital interfacing is facilitated by a double buffered latch. The input latch consists of one 8-bit byte and one 4-bit nibble to allow interfacing to 8-bit (right justified format) or 16-bit data buses. Input gating logic is designed so that the last nibble or byte to be loaded can be loaded simultaneously with the transfer of data to the D/A latch saving computer instructions. A reset control allows the DAC813 D/A latch to asynchronously reset the D/A output to bipolar zero, a feature useful for power-up reset, recalibration, or for system re-initialization upon system failure. The DAC813 is specified to ±1/2LSB maximum lin- earity error (J, A grades) and ±1/4LSB (K grade). It is packaged in 28-pin 0.3" wide plastic DIP and 28-lead plastic SOIC © 1990 Burr-Brown Corporation PDS-1077G Printed in U.S.A. March, 1998 SBAS004 |
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