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TLE5010 Datasheet(PDF) 32 Page - Infineon Technologies AG |
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TLE5010 Datasheet(HTML) 32 Page - Infineon Technologies AG |
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32 / 56 page  TLE5010 Register Table Draft Preliminary Data Sheet 32 V 0.9, 2007-05 9 Register Table This chapter defines the complete address range as well as all registers of the TLE5010. It also defines the read/write access rights of the specific registers. In the following table values through symbols are listed. Access to the registers is done via the SSC interface. Table 16 Address Map Addr. Name Bits 7 6 5 4 3 2 1 0 00H CTRL1 - - - - SSC_ FILT - AUTO UR 01H XL XLow 02H XH XHigh 03H YL YLow 04H YH YHigh 05H FCNT_ STAT - STAT_ VR GMR_ OFF UPDATE FCNT 06H FSYNC_ INV FILT_ INV FSYNC 07H ANGT - ANGT_ EN ANGT_Y ANGT_X 08H - reserved 09H - reserved 0AH - reserved 0BH - reserved 0CH TST TEMP_ EN ADCPY FILT_ PAR FILT_ CRS FILT_ BYP TST_ ADC TST_ GMR TST_ CHAN 0DH ID DEV_ID REV_ID 0EH LOCK LOCK 0FH CRTL2 VDD_ OV VDD_ OFF GND_ OFF VRG_ OV VRA_ OV VRD_ OV S_NO |
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