WM8994ECSSLASHR datasheet(280/363 Pages) CIRRUS

280 / 363 page

WM8994

280

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R88 (58h) DC

Servo

Readback

9:8

DCS_CAL_COM

PLETE [1:0]

DC Servo Complete status

0 = DAC Write or Start-Up DC Servo mode not completed.

1 = DAC Write or Start-Up DC Servo mode complete.

Bit [1] = HPOUT1R

Bit [0] = HPOUT1L

5:4

DCS_DAC_WR

_COMPLETE

[1:0]

DC Servo DAC Write status

0 = DAC Write DC Servo mode not completed.

1 = DAC Write DC Servo mode complete.

Bit [1] = HPOUT1R

Bit [0] = HPOUT1L

1:0

DCS_STARTUP

_COMPLETE

[1:0]

DC Servo Start-Up status

0 = Start-Up DC Servo mode not completed.

1 = Start-Up DC Servo mode complete.

Bit [1] = HPOUT1R

Bit [0] = HPOUT1L

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R89 (59h) DC

Servo Write

Val

15:8

DCS_DAC_WR

_VAL_1 [7:0]

0000_0000

Writing to this field sets the DC Offset value for HPOUT1R

in DAC Write DC Servo mode.

Reading this field gives the current DC Offset value for

HPOUT1R.

Two’s complement format.

LSB is 0.25mV.

Range is -32mV to +31.75mV

7:0

DCS_DAC_WR

_VAL_0 [7:0]

0000_0000

Writing to this field sets the DC Offset value for HPOUT1L

in DAC Write DC Servo mode.

Reading this field gives the current DC Offset value for

HPOUT1L.

Two’s complement format.

LSB is 0.25mV.

Range is -32mV to +31.75mV

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R96 (60h)

Analogue HP

(1)

HPOUT1L_RMV

_SHORT

Removes HPOUT1L short

0 = HPOUT1L short enabled

1 = HPOUT1L short removed

For normal operation, this bit should be set as the final step

of the HPOUT1L Enable sequence.

HPOUT1L_OUT

Enables HPOUT1L output stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after the DC

offset cancellation has been scheduled.

HPOUT1L_DLY

Enables HPOUT1L intermediate stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after the

WM8994ECS/R Datasheet(PDF) 280 Page - Cirrus Logic

WM8994ECS/R Datasheet(HTML) 280 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL