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M58LR128GT Datasheet(PDF) 46 Page - STMicroelectronics |
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M58LR128GT Datasheet(HTML) 46 Page - STMicroelectronics |
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46 / 84 page  M58LR128GT, M58LR128GB 46/84 Table 23. Asynchronous Read AC Characteristics Note: 1. Sampled only, not 100% tested. 2. G may be delayed by up to tELQV - tGLQV after the falling edge of E without increasing tELQV. Symbol Alt Parameter Unit 85 tAVAV tRC Address Valid to Next Address Valid Min 85 ns tAVQV tACC Address Valid to Output Valid (Random) Max 85 ns tAVQV1 tPAGE Address Valid to Output Valid (Page) Max 25 ns tAXQX (1) tOH Address Transition to Output Transition Min 0 ns tELTV Chip Enable Low to Wait Valid Max 14 ns tELQV (2) tCE Chip Enable Low to Output Valid Max 85 ns tELQX (1) tLZ Chip Enable Low to Output Transition Min 0 ns tEHTZ Chip Enable High to Wait Hi-Z Max 14 ns tEHQX (1) tOH Chip Enable High to Output Transition Min 2 ns tEHQZ (1) tHZ Chip Enable High to Output Hi-Z Max 14 ns tGLQV (2) tOE Output Enable Low to Output Valid Max 20 ns tGLQX (1) tOLZ Output Enable Low to Output Transition Min 0 ns tGLTV Output Enable Low to Wait Valid Max 14 ns tGHQX (1) tOH Output Enable High to Output Transition Min 2 ns tGHQZ (1) tDF Output Enable High to Output Hi-Z Max 14 ns tGHTZ Output Enable High to Wait Hi-Z Max 14 ns tAVLH tAVADVH Address Valid to Latch Enable High Min 7 ns tELLH tELADVH Chip Enable Low to Latch Enable High Min 10 ns tLHAX tADVHAX Latch Enable High to Address Transition Min 7 ns tLLLH tADVLADVH Latch Enable Pulse Width Min 7 ns tLLQV tADVLQV Latch Enable Low to Output Valid (Random) Max 85 ns |
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