PCM1850

PCM1851

SLES108 − MARCH 2004

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23

CONTROL INTERFACE TIMING REQUIREMENTS (PCM1850)

Figure 29 shows a detailed timing diagram for the serial control interface of the PCM1850. These timing parameters are

critical for proper control port operation.

t(MCH)

1.4 V

MS

t(MSS)

LSB

1.4 V

1.4 V

t(MCL)

t(MHH)

t(MSH)

t(MCY)

t(MDH)

t(MDS)

MC

MD

SYMBOL

PARAMETERS

MIN

MAX

UNITS

t(MCY)

MC pulse cycle time

100

ns

t(MCL)

MC LOW level time

40

ns

t(MCH)

MC HIGH level time

40

ns

t(MHH)

MS HIGH level time

80

ns

t(MSS)

MS falling edge to MC rising edge

15

ns

t(MSH)

MS hold time(1)

15

ns

t(MDH)

MD hold time

15

ns

t(MDS)

MD setup time

15

ns

(1) MC rising edge for LSB to MS rising edge.

Figure 29. PCM1850 Control Interface Timing

I2C SERIAL CONTROL PORT FOR MODE CONTROL (PCM1851)

The user-programmable built-in function of the PCM1851 can be controlled through the I2C-format serial control port, SDA

(pin 32) and SCL (pin 31). The PCM1851 supports the I2C serial bus and the data transmission protocol for standard mode

as a slave device. This protocol is explained in the I2C specification 2.0.

Slave Address

MSB

LSB

1

0

0

1

0

1

ADR

R/nW

The PCM1851 has 7 bits for its own slave address. The first six bits (MSBs) of the slave address are factory preset to

100101. The last bit of the address byte is the device select bit, which can be user-defined by the ADR pin (pin 30). A

maximum of two PCM1851s can be connected on the same bus at one time. Each PCM1851 responds when it receives

its own slave address.